欢迎访问ic37.com |
会员登录 免费注册
发布采购

33879_12 参数 Datasheet PDF下载

33879_12图片预览
型号: 33879_12
PDF下载: 下载PDF文件 查看货源
内容描述: 可配置8路串联开关,负载开路检测电流关闭 [Configurable Octal Serial Switch with Open Load Detect Current Disable]
分类和应用: 开关
文件页数/大小: 23 页 / 645 K
品牌: FREESCALE [ Freescale ]
 浏览型号33879_12的Datasheet PDF文件第14页浏览型号33879_12的Datasheet PDF文件第15页浏览型号33879_12的Datasheet PDF文件第16页浏览型号33879_12的Datasheet PDF文件第17页浏览型号33879_12的Datasheet PDF文件第19页浏览型号33879_12的Datasheet PDF文件第20页浏览型号33879_12的Datasheet PDF文件第21页浏览型号33879_12的Datasheet PDF文件第22页  
FUNCTIONAL DESCRIPTION  
DEVICE OPERATION  
declare the load open in the OFF state when the output drain-  
output. Each clamp independently limits the drain-to-source  
voltage to 45 V for low side drive configurations and -20 V for  
high side drive configurations. The total energy clamped (EJ)  
can be calculated by multiplying the current area under the  
current curve (IA) times the clamp voltage (VCL) (see  
Figure 18).  
to-source voltage is less than VOUT(FLT-TH)  
.
This device has an internal 80 μA current source  
connected from drain to source of the output MOSFET. The  
current source may be programmed on or off via SPI. The  
Power-ON Reset state for the current source is “off” and must  
be enabled via SPI. To achieve low Sleep mode quiescent  
currents, the Open Load Detection Current source of each  
driver is switched off when VDD or EN is removed.  
Characterization of the output clamps, using a single pulse  
non-repetitive method at 0.35 A, indicates the maximum  
energy per output to be 50 mJ at 150°C junction temperature.  
During output switching, especially with capacitive loads,  
a false output OFF open load fault may be triggered. To  
prevent this false fault from being reported, an internal fault  
filter of 100 μs to 300 μs is incorporated. A false fault  
reporting is a function of the load impedance, RDS(ON), COUT  
of the MOSFET, as well as the supply voltage, VPWR. The  
rising edge of CS triggers the built-in fault delay timer. The  
timer will time out before the fault comparator is enabled and  
the fault is detected. Once the condition causing the open  
load fault is removed, the device will resume normal  
operation. The open load fault, however, will be latched in the  
output DO register for the MCU to read.  
Drain-to-Source Clamp  
Voltage (VCL = 45 V)  
Drain Voltage  
Clamp Energy  
Drain Current  
(ID = 0.3 A)  
(E = I x V )  
J
A
CL  
Drain-to-Source ON  
Voltage (V  
)
Current  
Area (I  
DS(ON)  
)
A
GND  
Drain-to-Source ON  
Voltage (V  
Time  
BAT  
Time  
SHORTED LOAD FAULT  
)
DS(ON)  
VS  
A shorted load (over-current) fault can be caused by any  
output being shorted directly to supply, or an output  
experiencing a current greater than the current limit.  
GND  
Current  
Area (I )  
A
There are two safety circuits progressively in operation  
during load short conditions that provide system protection:  
Clamp Energy  
(E = I x V )  
CL  
J
A
1. The device’s output current is monitored in an analog  
fashion using SENSEFET approach and current  
limited.  
Source Current  
(I = 0.3 A)  
S
Source Clamp Voltage  
Source Voltage  
2. The device’s output thermal limit is sensed and when  
attained causes only the specific faulted output to shut  
down. The output will remain off until cooled. The  
device will then reassert the output automatically. The  
cycle will continue until fault is removed or the  
command bit instructs the output off. Shorted load  
faults will be reported properly through the SPI  
regardless of Open Load Detection Current enable  
bits.  
(V  
= -15 V)  
CL  
Figure 18. Output Voltage Clamping  
SPI CONFIGURATIONS  
The SPI configuration on the 33879 device is consistent  
with other devices in the Octal Serial Switch (OSS) family.  
This device may be used in serial SPI or parallel SPI with the  
33298 and 33291. Different SPI configurations may be  
provided. For more information, contact Freescale Analog  
Products Division or the local Freescale representative.  
UNDER-VOLTAGE SHUTDOWN  
An under-voltage condition on VDD or VPWR will result in  
the shutdown of all outputs. The VDD under-voltage threshold  
is between 0.8 and 3.0 V. VPWR under-voltage threshold is  
between 3.0 and 5.0 V. When the supplies fall below their  
respective thresholds, all outputs are turned OFF. As both  
supplies returns to normal levels, internal logic is reset and  
the device resumes normal operation.  
REVERSE BATTERY  
The 33879 has been designed with reverse battery  
protection on the VPWR pin.  
All outputs consist of a power MOSFET with an integral  
substrate diode. During the reverse battery condition, current  
will flow through the load via the substrate diode. Under this  
circumstance, relays may energize and lamps will turn on.  
Where load reverse battery protection is desired, a reverse  
battery blocking diode must be placed in series with the load.  
OUTPUT VOLTAGE CLAMP  
Each output of the 33879 incorporates an internal voltage  
clamp to provide fast turn-off and transient protection of each  
33879  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
18  
 复制成功!