PIN CONNECTIONS
PIN CONNECTIONS
1
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
VDSNS4
GD4
VDSNS5
GD5
VDSNS6
GD6
VSSNS456
LRFDBK
SI
VDSNS3
GD3
VDSNS2
GD2
VDSNS1
GD1
VSSNS123
REXT
PGND1
OUT1
PGND2
OUT2
OUT3
OUT4
OUT5
PGND
OUT6
OUT7
OUT8
DEFAULT
SO
VDD
VCAL
GND
2
3
4
5
6
7
8
9
SCLK
CS
P1
P3
P5
P7
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
CCD2_GND
CCD2_OUT
CCD2_REC
EN
VPWR
CCD1_GND
CCD1_REC
RI_REF
CCD1_OUT
Figure 3. 33800 Pin Connections
Table 1. 33800 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page 16.
Pin Number Pin Name Pin Function
Formal Name
Definition
The VDSNS pin is used to monitor the drain voltage of the external
MOSFET.
1, 3, 5, 50,
52, 54
VDSNS1-
VDSNS6
Input
Drain Voltage Sense
The GD pin provides gate drive for an external MOSFET
2, 4, 6, 49,
51, 53
GD1-GD6
Output
Input
Gate Driver Output
The VSSNS pins are used to monitor the source voltage of the external
MOSFETS.
7
VSSNS456
VSSNS123
Source Voltage Sense
48
The LRFDBK pin is an operational amplifier output.
8
LRFDBK
Output
Input
Load Resistance
Feedback
The SI input pin is used to receive serial data from the MCU. The serial
input data is latched on the rising edge of SCLK, and the input data
transitions on the falling edge of SCLK.
9
SI
Serial Input Data
The SCLK input pin is used to clock in and out the serial data on the SI
and SO Pins while being addressed by the CS.
10
11
SCLK
CS
Input
Input
Serial Clock Input
Chip Select
The Chip Select input pin is an active low signal sent by the MCU to
indicate that the device is being addressed. This input requires CMOS
logic levels and has an internal active pull up current source.
Input control of OSS output 1. When configured via the SPI, P1 input may
be used to control OSS output 1 and output 2 in parallel.
12
13
14
P1
P3
P5
Input
Input
Input
Input One
Input Three
Input Five
Input control of OSS output 3. When configured via the SPI, P3 input may
be used to control OSS output 3 and output 4 in parallel.
Input control of OSS output 5. When configured via the SPI, P5 input may
be used to control OSS output 5 and output 6 in parallel.
33800
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
FREESCALE [ Freescale ]
