FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Table 12. Output Voltage of SREG1
Address: 0101(31)
B7
B6
B5
B4
B3
B2
B1
Reserved
SREG1 [V](33)
L
H
L
L
L
L
L
L
H
H
L
L
L
L
L
L
H
L
H
L
L
L
L
L
H
L
L
H
L
L
L
L
H
L
L
L
H
L
L
L
H
L
L
L
L
H
L
L
H
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
1.349
1.833
1.848
1.863
1.893
1.954
2.075
2.317
2.800
H
H
H
H
H
H
H
H
Notes
31. All combinations of input are not included.
32. The SREG1 and 3 output voltages are determined by the combination of external resistances connected to
SREGC1 and 3 (65.14KΩ between SREGO1 and SREGC1, 34.86KΩ between SREGC1 and GND,
73.84KΩ between SREGO3 and SREGC3, and 26.16KΩ between SREGC3 and GND).
Table 13. Output Voltage of SREG2
Address: 0110(33)
B7
B6
B5
B4
B3
B2
B1
B0
SREG2 [V]
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
H
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
H
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
H
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
H
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
H
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
H
0.011
0.022
0.033
0.055
0.098
0.186
0.361
0.711
1.411
1.422
1.433
1.455
1.498
1.586
1.761
2.111
2.800
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
Notes
33. All combinations of input are not included.
Table 14. Output Voltage of SREG3
Address: 0111(34)
B7
B6
B5
B4
B3
B2
CP Off
EXTG On
SREG3 [V](35)
L
L
L
L
L
L
X
X
2.080
18730
Analog Integrated Circuit Device Data
Freescale Semiconductor
21