FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
will disable the output from direct control (in this case, the
output is only controlled by On bit).
A logic [1] on bit D3 (OLON_dis_s) disables the ON output
open-load detection for the selected output, the default value
[0] corresponds to enable this feature (Table 14).
D4:D3 bits (SR1_s and SR0_s) are used to select the high
or medium or low speed slew rate for the selected output, the
default value [00] corresponds to the medium speed slew rate
(Table 13).
A logic [1] on bit D2 (OLOFF_dis_s) disables the OFF
output open-load detection for the selected output, the
default value [0] corresponds to enable this feature.
A logic [1] on bit D1 (OLLED_en_s) enables the ON output
open-load detection for LEDs for the selected output, the
default value [0] corresponds to ON output open-load
detection is set for bulbs (Table 14).
Table 13. Slew Rate Speed Selection
SR1_s (D4)
SR0_s (D3)
Slew Rate Speed
0
0
1
1
0
1
0
1
medium (default)
low
Table 14. ON Open-load Selection
OLLED_en_s
high
OLON_dis_s (D3)
ONOpen-loaddetection
(D1)
Not used
0
0
enable with bulb
threshold (default)
Incoming message bits D2:D0 reflect the desired output
that will be delayed of predefined PWM clock rising edges
number, as shown Table 8, (only available for PWM_en bit is
set to logic [1]).
0
1
enable with LED
threshold
1
X
disable
ADDRESS A A 011—OUTPUT CONFIGURATION
REGISTER (CONFR1_S)
1
0
A logic [1] on bit D0 (CSNS_ratio_s) selects the high ratio
on the CSNS pin for the corresponding output. The default
value [0] is the low ratio (Table 15).
The CONFR1_s register allows the MCU to configure
corresponding output fault management through the SPI.
Each output “s” is independently selected for configuration
based on the state of the D14:D13 bits (Table 12).
Table 15. Current Sense Ratio Selection
CSNS_high_s (D0)
Current Sense Ratio
A logic [1] on bit D6 (RETRY_unlimited_s) disables the
autoretry counter for the selected output, the default value [0]
corresponds to enable autoretry feature without time
limitation.
0
1
CRS0 (default)
CRS1
ADDRESS A A 100—OUTPUT OVER-CURRENT
REGISTER (OCR)
A logic [1] on bit D5 (RETRY_dis_s) disables the autoretry
for the selected output, the default value [0] corresponds to
enable this feature.
1
0
The OCR_s register allows the MCU to configure
corresponding output over-current protection through the
SPI. Each output “s” is independently selected for
configuration based on the state of the D14:D13 bits
(Table 12).
A logic [1] on bit D4 (OS_dis_s) disables the output hard
shorted to VPWR protection for the selected output, the
default value [0] corresponds to enable this feature.
10XS3412
Analog Integrated Circuit Device Data
Freescale Semiconductor
35