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10XS3412_12 参数 Datasheet PDF下载

10XS3412_12图片预览
型号: 10XS3412_12
PDF下载: 下载PDF文件 查看货源
内容描述: 四通道高边开关(双10毫欧,双12毫欧) [Quad High Side Switch (Dual 10 mOhm, Dual 12 mOhm)]
分类和应用: 开关
文件页数/大小: 51 页 / 1411 K
品牌: FREESCALE [ Freescale ]
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ELECTRICAL CHARACTERISTICS  
STATIC ELECTRICAL CHARACTERISTICS  
Table 4. Static Electrical Characteristics (continued)  
Characteristics noted under conditions 6.0 V VPWR 20 V, 3.0 V VDD 5.5 V, -40 °C TA 125 °C, GND = 0 V, unless  
otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25 °C under nominal conditions, unless  
otherwise noted.  
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
CONTROL INTERFACE  
Input Logic High Voltage(20)  
Input Logic Low Voltage(20)  
V
2.0  
-0.3  
5.0  
5.0  
VDD+0.3  
0.8  
V
V
IH  
V
IL  
Input Logic Pull-down Current (SCLK, SI)(23)  
Input Logic Pull-up Current (CS)(24)  
SO, FS Tri-state Capacitance(21)  
I
20  
μA  
μA  
pF  
kΩ  
pF  
V
DWN  
I
20  
UP  
C
20  
SO  
Input Logic Pull-down Resistor (RST, WAKE and IN[0:3])  
Input Capacitance(21)  
R
125  
250  
4.0  
500  
12  
DWN  
C
IN  
Wake Input Clamp Voltage(22), I  
10XS3412CHFK  
< 2.5 mA  
V
CL(WAKE)  
CL(WAKE)  
19  
20  
25  
27  
32  
35  
10XS3412DHFK  
Wake Input Forward Voltage  
V
V
V
F(WAKE)  
I
= -2.5 mA  
-2.0  
0
-0.3  
CL(WAKE)  
SO High state Output Voltage  
= 1.0 mA  
V
SOH  
I
V
-0.4  
OH  
DD  
SO and FS Low state Output Voltage  
= -1.0 mA  
V
V
SOL  
I
0.4  
2.0  
OL  
SO, CSNS and FS Tri-state Leakage Current  
I
μA  
kΩ  
SO(LEAK)  
RFS  
CS = VIH and 0 V < VSO < VDD, or FS = 5.5 V, or CSNS=0.0 V  
-2.0  
FSI External Pull-down Resistance(25)  
Watchdog Disabled  
0
1.0  
Watchdog Enabled  
10  
Infinite  
Notes  
20. Upper and lower logic threshold voltage range applies to SI, CS, SCLK, RST, IN[0:3] and WAKE input signals. The WAKE and RST  
signals may be supplied by a derived voltage referenced to V  
.
PWR  
21. Input capacitance of SI, CS, SCLK, RST, IN[0:3] and WAKE. This parameter is guaranteed by process monitoring but is not production  
tested.  
22. The current must be limited by a series resistance when using voltages > 7.0 V.  
23. Pull-down current is with VSI > 1.0 V and VSCLK > 1.0 V.  
24. Pull-up current is with VCS < 2.0 V. CS has an active internal pull-up to V  
.
DD  
25. In Fail Safe HS[0:3] depends respectively on ON[0:3]. FSI has an active internal pull-up to V  
~ 3.0 V.  
REG  
10XS3412  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
12