F81867
2
1
0
GPIO52_ST
GPIO51_ST
GPIO50_ST
R
R
R
-
-
-
-
-
-
The pin status of GPIO52/DRVA#/SOUT6/P32.
The pin status of GPIO51/MOA#/SIN6/P31.
The pin status of GPIO50/DENSEL#/RTS6#/P30.
GPIO5 Drive Enable Register ⎯ Index A3h
Name R/W Reset Default
Bit
Description
GPIO57 Drive Enable.
0: GPIO57 is open drain.
1: GPIO57 is push pull.
7
GPIO57_DRV_EN R/W LRESET#
GPIO56_DRV_EN R/W LRESET#
0
0
0
0
0
0
0
0
GPIO56 Drive Enable.
0: GPIO56 is open drain.
1: GPIO56 is push pull.
6
5
4
3
2
1
0
GPIO55 Drive Enable.
0: GPIO55 is open drain.
1: GPIO55 is push pull.
GPIO55_DRV_EN
R/w LRESET#
GPIO54 Drive Enable.
0: GPIO54 is open drain.
1: GPIO54 is push pull.
GPIO54_DRV_EN R/W LRESET#
GPIO53_DRV_EN R/W LRESET#
GPIO52_DRV_EN R/W LRESET#
GPIO51_DRV_EN R/W LRESET#
GPIO50_DRV_EN R/W LRESET#
GPIO53 Drive Enable.
0: GPIO53 is open drain.
1: GPIO53 is push pull.
GPIO52 Drive Enable.
0: GPIO52 is open drain.
1: GPIO52 is push pull.
GPIO51 Drive Enable.
0: GPIO51 is open drain.
1: GPIO51 is push pull.
GPIO50 Drive Enable.
0: GPIO50 is open drain.
1: GPIO50 is push pull.
GPIO5 SMI Enable Register ⎯ Index A8h
Bit
Name
R/W Reset Default
Description
0: Disable SMI event.
7
GPIO57_SMI_EN
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
0
0
0
0
0
0
1: Enable SMI event via PME# or SIRQ if GPIO57_SMI_ST is set.
0: Disable SMI event.
6
5
4
3
2
GPIO56_SMI_EN
GPIO55_SMI_EN
GPIO54_SMI_EN
GPIO53_SMI_EN
GPIO52_SMI_EN
1: Enable SMI event via PME# or SIRQ if GPIO56_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO55_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO54_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO53_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO52_SMI_ST is set.
161
Dec, 2011
V0.12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
