F81867
4
3
2
1
0
GPIO44_ST
GPIO43_ST
GPIO42_ST
GPIO41_ST
GPIO40_ST
R
R
R
R
R
-
-
-
-
-
-
-
-
-
-
The pin status of RTS4#/GPIO44.
The pin status of DTR4#/GPIO43.
The pin status of CTS4#/GPIO42.
The pin status of RI4#/GPIO41.
The pin status of DCD4#/GPIO40.
GPIO4 Drive Enable Register ⎯ Index B3h
Name R/W Reset Default
Bit
Description
GPIO47 Drive Enable.
0: GPIO47 is open drain.
1: GPIO47 is push pull.
7
GPIO47_DRV_EN R/W LRESET#
GPIO46_DRV_EN R/W LRESET#
0
0
0
0
0
0
0
0
GPIO46 Drive Enable.
0: GPIO46 is open drain.
1: GPIO46 is push pull.
6
5
4
3
2
1
0
GPIO45 Drive Enable.
0: GPIO45 is open drain.
1: GPIO45 is push pull.
GPIO45_DRV_EN
R/w LRESET#
GPIO44 Drive Enable.
0: GPIO44 is open drain.
1: GPIO44 is push pull.
GPIO44_DRV_EN R/W LRESET#
GPIO43_DRV_EN R/W LRESET#
GPIO42_DRV_EN R/W LRESET#
GPIO41_DRV_EN R/W LRESET#
GPIO40_DRV_EN R/W LRESET#
GPIO43 Drive Enable.
0: GPIO43 is open drain.
1: GPIO43 is push pull.
GPIO42 Drive Enable.
0: GPIO42 is open drain.
1: GPIO42 is push pull.
GPIO41 Drive Enable.
0: GPIO41 is open drain.
1: GPIO41 is push pull.
GPIO40 Drive Enable.
0: GPIO40 is open drain.
1: GPIO40 is push pull.
7.7.9
GPIO5x Configuration Registers
Register Name
Register
0x[HEX]
Default Value
MSB
LSB
A0
GPIO5 Output Enable Register
GPIO5 Output Data Register
GPIO5 Pin Status Register
GPIO5 Drive Enable Register
GPIO5 SMI Enable Register
GPIO5 SMI Status Register
0
0
1
-
0
1
-
0
1
-
0
1
-
0
1
-
0
1
-
0
1
-
A1
A2
A3
A8
A9
1
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
159
Dec, 2011
V0.12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
