F81867
WDT Control Port ⎯ Offset 03h
Bit
Name
R/W Reset Default
Description
The bit is pre-defined for Port 80 WDT function. User could change its
usage.
7
P80_WDT_TO_ST R/W 5VSB
0
0
The WDT is implemented by firmware. When time out occurs, EC set this bit
and could assert reset signal from defined pins. Host read this bit to check
the status and write “1” to clear status.
The bit is pre-defined for Port 80 WDT function. EC read this bit to
enable/disable WDT function.
5VSB
6
P80_WDT_EN
R/W
0: Disable WDT function.
1: Enable WDT function.
The bit is pre-defined for Port 80 WDT function. EC read this bit to decide
WDT unit. The unit is user defined.
5VSB
5VSB
5-4
3-0
P80_WDT_UNIT
P80_WDT_PIN
R/W
R/W
0
0
The bit is pre-defined for Port 80 WDT function. This is the mask for WDT
event pins. The pin to assert WDT event is user defined.
WDT Time Register ⎯ Offset 04h
Bit
Name
R/W Reset Default
Description
The byte is pre-defined for Port 80 WDT function. Host writes this byte to
inform EC the WDT count down time.
7-0
P80_WDT_TIME
R/W 5VSB
ffh
WDT Enable Code ⎯ Offset 05h
Name R/W Reset Default
Bit
Description
The byte is pre-defined for Port 80 WDT function. EC wait for WDT start until
0x80 port data matches this byte.
7-0
P80_WDT_CODE R/W 5VSB
-
80 Port Data ⎯ Offset 06h
Bit
Name
R/W Reset Default
Description
The data write to 0x80/0x81(if P80_DEC_RANGE is set) will be latched into
this byte. EC could dump the value into internal RAM for further use.
7-0
P80_DATA
R/W 5VSB
-
80 Port Data ⎯ Offset 07h
Bit
Name
R/W Reset Default
Description
This byte is pre-defined for the last 0x80 port last data. EC write 0x80 port
data back to this byte.
7-0
P80_LAST_DATA
R
5VSB
-
118
Dec, 2011
V0.12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
