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F81867D 参数 Datasheet PDF下载

F81867D图片预览
型号: F81867D
PDF下载: 下载PDF文件 查看货源
内容描述: 6个UART μSuper IO 128字节FIFO和省电功能 [6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions]
分类和应用: 先进先出芯片
文件页数/大小: 315 页 / 2394 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F81867  
6.11 Over Voltage Protection  
F81867 over voltage protection function could protect the damage from voltage spikes via over voltage  
protection (OVP) function. Voltage protection function is enabled via setting the related register. When  
the force mode occurs, the system would shut down and then can not boot at all. Only re-plugging the  
power code (cut off VSB) could re-activate or re-boot the system at the force mode.  
6.12 Microcontroller  
A microcontroller contains a processor core, memory, and programmable input/output peripherals made it  
economical for designers. Basically Microcontrollers are designed for embedded applications such as  
automobile engine control systems, medical devices, remote controls, office machines, appliances, power  
tools, and toys.  
F81867 integrates 8 bit 8032 embedded microcontroller which could access GPIO, PWM, hardware  
monitor, KBC, ACPI & CIR function. See detail for the μC side regeister.  
6.13 Debug Port Function  
The Debug Port is the interface for host to control the EC side devices. When it is enabled, it  
replaces EC to control its peripherals and could also access SFR and internal RAM of μC. Please refer  
to the Debug Port register in EC side to fully control the EC.  
Debug Port Data Register Offset 00h  
Bit  
Name  
R/W Reset Default  
Description  
Write data to this byte will change the EC side register which address is set  
by DBPORT_EC_ADDR.  
7-0  
DBPORT_DATA  
R/W 5VSB  
0h  
Read data from this byte will return the value of EC side register which  
address is set by DBPORT_EC_ADDR.  
Debug Port Control Register Offset 01h  
Bit  
7
Name  
R/W Reset Default  
Description  
This bit is set when a break point is triggered.  
Reserved.  
BRK_PTR_TRIG  
Reserved  
R
-
5VSB  
-
0
-
6-1  
0: Disable debug port.  
1: Enable debug port.  
7-0  
DBPORT_EN  
R/W 5VSB  
0
116  
Dec, 2011  
V0.12P  
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