F81866A
7.7.9.1GPIO5 Output Enable Register ⎯ Index A0h
Bit
Name
R/W Reset Default
Description
0: GPIO57 is in input mode.
1: GPIO57 is in output mode.
7
GPIO57_OE
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
0
0
0
0
0
0
0
0
0: GPIO56 is in input mode.
1: GPIO56 is in output mode.
6
5
4
3
2
1
0
GPIO56_OE
GPIO55_OE
GPIO54_OE
GPIO53_OE
GPIO52_OE
GPIO51_OE
GPIO50_OE
0: GPIO55 is in input mode.
1: GPIO55 is in output mode.
0: GPIO54 is in input mode.
1: GPIO54 is in output mode.
0: GPIO53 is in input mode.
1: GPIO53 is in output mode.
0: GPIO52 is in input mode.
1: GPIO52 is in output mode.
0: GPIO51 is in input mode.
1: GPIO51 is in output mode.
0: GPIO50 is in input mode.
1: GPIO50 is in output mode.
7.7.9.2GPIO5 Output Data Register ⎯ Index A1h (This byte could be also written by base address + 5 )
Bit
Name
R/W Reset Default
Description
0: GPIO57 outputs 0 when in output mode.
1: GPIO57 outputs 1 when in output mode.
7
GPIO57_DATA
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
1
1
1
1
1
1
1
1
0: GPIO56 outputs 0 when in output mode.
1: GPIO56 outputs 1 when in output mode.
6
5
4
3
2
1
0
GPIO56_DATA
GPIO55_DATA
GPIO54_DATA
GPIO53_DATA
GPIO52_DATA
GPIO51_DATA
GPIO50_DATA
0: GPIO55 outputs 0 when in output mode.
1: GPIO55 outputs 1 when in output mode.
0: GPIO54 outputs 0 when in output mode.
1: GPIO54 outputs 1 when in output mode.
0: GPIO53 outputs 0 when in output mode.
1: GPIO53 outputs 1 when in output mode.
0: GPIO52 outputs 0 when in output mode.
1: GPIO52 outputs 1 when in output mode.
0: GPIO51 outputs 0 when in output mode.
1: GPIO51 outputs 1 when in output mode.
0: GPIO50 outputs 0 when in output mode.
1: GPIO50 outputs 1 when in output mode.
7.7.9.3GPIO5 Pin Status Register ⎯ Index A2h (This byte could be also read by base address + 5 )
Bit
Name
R/W Reset Default
Description
7
GPIO57_ST
R
-
-
The pin status of GPIO57/WGATE#/DSR6#.
157
Jan, 2012
V0. 12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
