F81866A
PIN20
PIN21
GPIO63/WPT#/DTR5#
WPT#
GPIO64/DSKCHG#/DSR5#
DSKCHG#
7.2.2Multi Function Register Mapping For Parallel Port (LPT)
PIN No.
PIN FULL NAME
FANIN3/SLCT
GPIO70/PE/FANCTL3/PWM_D
AC3
PIN SELECT
CONFIGURE REGISTER
PIN102
SLCT
PIN103
PE
PIN104
PIN105
PIN106
PIN107
PIN108
PIN109
PIN110
PIN111
PIN112
PIN113
PIN114
PIN115
PIN116
PIN117
PIN118
GPIO71/BUSY
GPIO72/ACK#
GPIO73/SLIN#
GPIO74/INIT#
GPIO75/ERR#
GPIO76/AFD#
GPIO77/STB#
GPIO80/PD0
BUSY
ACK#
SLIN#
INIT#
ERR#
AFD#
STB#
PD0
INDEX 27H BIT3-2 = 00 AND BIT0 = 0
INDEX 28H BIT5 = 0
INDEX 2BH BIT1-0 = 00
GPIO81/PD1
PD1
GPIO82/PD2
PD2
GPIO83/PD3
PD3
GPIO84/PD4
PD4
GPIO85/PD5
PD5
GPIO86/PD6
PD6
GPIO87/PD7
PD7
7.2.3Multi Function Register Mapping For Hardware Monitor
PIN No.
PIN FULL NAME
PIN SELECT
CONFIGURE REGISTER
INDEX 27H BIT3-2 = 01 AND BIT0 = 0
INDEX 29H BIT2 = 0
PIN71
BEEP/GPIO16/SDA/CIRRX#
BEEP
INDEX 2CH BIT6 = 0
INDEX 27H BIT3-2 = 10 AND BIT0 = 0
INDEX 29H BIT3 = 0
PIN76
ALERT#/GPIO20/SCL/CIRRX#
FANIN3/SLCT
ALERT#
INDEX 2CH BIT0 = 0
INDEX 27H BIT0 = 0
PIN102
PIN103
FANIN3
INDEX 2BH BIT1 = 1
GPIO70/PE/FANCTL3/PWM_D
AC3
INDEX 27H BIT0 = 0
FANCTL3
INDEX 2BH BIT0 = 1
125
Jan, 2012
V0. 12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
