F81218
0
GPME10_EN
R/W
0 : disable PME via GP10
1 : enable PME via GP10.
6.11.7 PME Event 3 Control Register – index F6h
Power-on default [7:0] = 0x7Fh.
Bit
7:6
Name
Reserved
R/W
R/W
R/W
Description
Return 0 when read.
5
4
3
2
1
0
URFPME_EN
UREPME_EN
URDPME_EN
URCPME_EN
URBPME_EN
URAPME_EN
0 : disable PME via IRQ of UART 6
1 : enable PME via IRQ of UART 6.
0 : disable PME via IRQ of UART 5
1 : enable PME via IRQ of UART 5.
0 : disable PME via IRQ of UART 4
1 : enable PME via IRQ of UART 4.
0 : disable PME via IRQ of UART 3
1 : enable PME via IRQ of UART 3.
0 : disable PME via IRQ of UART 2
1 : enable PME via IRQ of UART 2.
0 : disable PME via IRQ of UART 1
1 : enable PME via IRQ of UART 1.
R/W
R/W
R/W
R/W
R/W
6.11.8 GPIO Port 2 Input Status Register – index F7h
Bit
Name
GP27_ST
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
7
6
5
4
3
2
1
0
Status of GP27
Status of GP26
Status of GP25
Status of GP24
Status of GP23
Status of GP22
Status of GP21
Status of GP20
GP26_ST
GP25_ST
GP24_ST
GP23_ST
GP22_ST
GP21_ST
GP20_ST
-47-
August, 2007
V0.33P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
