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F81218 参数 Datasheet PDF下载

F81218图片预览
型号: F81218
PDF下载: 下载PDF文件 查看货源
内容描述: ISA / LPC 6 UART数据表 [ISA/LPC to 6 UART Datasheet]
分类和应用: PC
文件页数/大小: 64 页 / 1414 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F81218  
6.1.2 Logic Device Select Register – index 07h  
Power-on default [7:0] = 0x00h  
Bit  
7:0  
Name  
LDN[7:0]  
R/W  
Description  
R/W  
00h : Select UART 1 device configuration register  
01h : Select UART 2 device configuration register  
02h : Select UART 3 device configuration register  
03h : Select UART 4 device configuration register  
04h : Select UART 5 device configuration register  
05h : Select UART 6 device configuration register  
06h : Select Address Decoder 1 device configuration register  
07h : Select Address Decoder 2 device configuration register  
08h : Select Watchdog Timer device configuration register  
09h : Select GPIO and PME device configuration register  
6.1.3 Device ID Register– index 20h, 21h  
Power-on default [7:0], 0x02h for index 20h, 0x06h for index 21h  
Bit  
7:0  
Name  
DEVID  
R/W  
Description  
Return 0206h when read index 20h and 21h respectively, indicate the  
device ID.  
R
6.1.4 Vendor ID Register– index 23h, 24h  
Power-on default [7:0], 0x19h for index 23h, 0x34h for index 24h  
Bit  
7:0  
Name  
VENDID  
R/W  
Description  
Return 1934h when read index 23h and 24h respectively, indicate the  
vendor ID of Fintek.  
R
6.1.5 Clock Source Select Register – index 25h  
Power-on default [7:0], 0x00h  
Bit  
7:1  
Name  
Reserved  
CLK_SEL  
R/W  
R/W  
R/W  
Description  
Return 0 when read.  
0
1 : The CLKIN is 48MHz  
-24-  
August, 2007  
V0.33P  
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