F81216
5. Functional Description
The F81216 totally provides 4 UART ports through LPC interface. Among 4 UART ports,
one ports can support serial infrared communication. Besides, each UART includes 16-byte
send/receive FIFO, a programmable baud rate generator, completed modem control
capability and interrupt system.
One watch dog timer is provided for system controlling and the time interval can be
programmed by register or hardware power on setting pin.
This IC needs one clock 24/48MHz input, and default is 24MHz. Powered by 3.3V voltage, the
F81216 is in 48 pin LQFP
5.1 LPC Interface
The F81216 can support LPC interface serving as a bus interface between host
(chipset) and peripheral (I/O chip) by hardware trapping. This interface provides much
less pins and more efficient transmission. Data transfer on the LPC bus is serialized over a
4 bit bus. The general characteristics of the interface implemented in F81216 are listed as
below:
One control line, namely LPC_FRAME#, which is used by the host to start or stop
transfers. No peripherals drive this signal.
The LPC_LAD[3:0] bus, which communicates information serially. The information
conveyed is cycle type, cycle direction, chip selection, address, data, and wait states.
PCIRST# is an active low reset signal.
An additional 33 MHz PCI clock is needed in the F81216 for synchronization.
Interrupt requests are issued through LPC_SERIRQ.
5.2 UART
A Universal Asynchronous Receiver/Transmitter (UART) is used to implement serial
communication. The F81216 incorporates four fully function UART compatible with NS16550D.
The UART ports perform serial to parallel conversion on receiving characters and parallel to
serial conversion on transmitting characters. The controllable characteristics of the data
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August, 2007
V0.32P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
