F75113
8.2.20 GPIO0X Edge Detector Enable Register ⎯ Index 18h
Name R/W Default Description
Bit
Enable GPIO07 Edge Detector. If this bit set to 1 and GPIO07
set to input mode (10h) will enable GPIO07 edge detection.
Default is disabled.
7
EN_GP07EDGE R/W
EN_GP06EDGE R/W
EN_GP05EDGE R/W
EN_GP04EDGE R/W
EN_GP03EDGE R/W
EN_GP02EDGE R/W
EN_GP01EDGE R/W
EN_GP00EDGE R/W
0
0
0
0
0
0
0
0
Enable GPIO06 Edge Detector. If this bit set to 1 and GPIO06
set to input mode (10h) will enable GPIO06 edge detection.
Default is disabled.
6
5
4
3
2
1
0
Enable GPIO05 Edge Detector. If this bit set to 1 and GPIO05
set to input mode (10h) will enable GPIO05 edge detection.
Default is disabled.
Enable GPIO04 Edge Detector. If this bit set to 1 and GPIO04
set to input mode (10h) will enable GPIO04 edge detection.
Default is disabled.
Enable GPIO03 Edge Detector. If this bit set to 1 and GPIO03
set to input mode (10h) will enable GPIO03 edge detection.
Default is disabled.
Enable GPIO02 Edge Detector. If this bit set to 1 and GPIO02
set to input mode (10h) will enable GPIO02 edge detection.
Default is disabled.
Enable GPIO01 Edge Detector. If this bit set to 1 and GPIO01
set to input mode (10h) will enable GPIO01 edge detection.
Default is disabled.
Enable GPIO00 Edge Detector. If this bit set to 1 and GPIO00
set to input mode (10h) will enable GPIO00 edge detection.
Default is disabled.
8.2.21 GPIO0X Edge Detector Status Register ⎯ Index 19h
Bit
Name
R/W Default
Description
Indicate GPIO07 Edge Status. If set to 1, the edge of GPIO07
has occurred. Write 1 to clear this bit. Writing 0 is invalid.
7
STS_GP07EDGE
R
R
-
-
Indicate GPIO06 Edge Status. If set to 1, the edge of GPIO06
has occurred. Write 1 to clear this bit. Writing 0 is invalid.
6
STS_GP06EDGE
- 31 -
Dec,2011
V0.13P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
