F71872
28h
29h
2Ah
2Bh
2Ch
2Dh
2Eh
2Fh
40h
41h
42h
43h
44h
45h
46h
47h
48h
49h
4Ah
4Bh
4Ch
4Dh
4Eh
4Fh
50h
51h
52h
53h
54h
55h
56h
57h
58h
59h
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FAN1 count limit. (MSB)
FAN1 count limit. (LSB)
FAN2 count limit. (MSB)
FAN2 count limit. (LSB).
FAN3 count limit. (MSB)
FAN3 count limit. (LSB)
VBAT high limit. This limit should correspond to the divided voltage.
VBAT low limit. This limit should correspond to the divided voltage.
VCC high limit. This limit should correspond to the divided voltage.
VCC low limit. This limit should correspond to the divided voltage.
VIN1 high limit.
VIN1 low limit.
VIN2 high limit.
VIN2 low limit.
VIN3 high limit.
VIN3 low limit.
VIN4 high limit.
VIN4 low limit.
VIN5 high limit.
VIN5 low limit.
VIN6 high limit.
VIN6 low limit.
VIN7 high limit.
VIN7 low limit.
VIN8 high limit.
VIN8 low limit.
VSB high limit. This limit should correspond to the divided voltage.
VSB low limit. This limit should correspond to the divided voltage.
T1 high limit.
T1 low limit.
T2 high limit.
T2 low limit.
T3 high limit.
T3 low limit.
7.6.3.12 INTERRUPT ENABLE Control Register 1 Index 30h
Bit
Name
R/W Default
Description
7
6
5
4
3
2
1
0
EN_VIN7
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Set to 1, enables VIN7 abnormal interrupt.
EN_VIN6
EN_VIN5
EN_VIN4
EN_VIN3
EN_VIN2
EN_VIN1
EN_3VDD
Set to 1, enables VIN6 abnormal interrupt.
Set to 1, enables VIN5 abnormal interrupt.
Set to 1, enables VIN4 abnormal interrupt.
Set to 1, enables VIN3 abnormal interrupt.
Set to 1, enables VIN2 abnormal interrupt.
Set to 1, enables VIN1 abnormal interrupt.
Set to 1, enables 3VDD abnormal interrupt.
72
July, 2007
V0.28P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
