F71872
1
0
GPIO31_EN
GPIO30_EN
R/W
R/W
0
0
0: the function of S3#/GPIO31 is S3#.
1: the function of S3#/GPIO31 is GPIO31.
0: the function of IRRX/GPIO30 is IRRX.
1: the function of IRRX/GPIO30 is GPIO30.
7.2 FDC Registers
7.2.1 Logic Device Number Register
Logic Device Number Register Index 07H
Bit
Name
R/W Default
R/W
Description
7-0 LDN
00h 00h: Select FDC device configuration registers.
01h: Select UART 1 device configuration registers.
02h: Select UART 2 device configuration registers.
03h: Select Parallel Port device configuration registers.
04h: Select Hardware Monitor device configuration registers.
05h: Select KBC device configuration registers.
06h: Select GPIO device configuration registers.
07h: Select VID device configuration registers.
0ah: Select PME & ACPI device configuration registers.
7.2.2 FDC Configuration Registers
FDC Device Enable Register Index 30h
Bit
Name
R/W Default
Description
7-1 Reserved
FDC_EN
-
-
Reserved
0
R/W
1
0: disable FDC.
1: enable FDC.
Base Address High Register Index 60h
Bit
Name
R/W Default
Description
34
July, 2007
V0.28P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
