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F71862FG 参数 Datasheet PDF下载

F71862FG图片预览
型号: F71862FG
PDF下载: 下载PDF文件 查看货源
内容描述: 超级硬件监控+ LPC I / O [Super Hardware Monitor + LPC I/O]
分类和应用: 监控PC
文件页数/大小: 110 页 / 837 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F71862  
8.1Global Control Registers  
8.1.1  
Bit  
Software Reset Register Index 02h  
Name R/W Default  
Description  
7-1 Reserved  
-
-
Reserved  
Write 1 to reset the register and device powered by VDD ( VCC ).  
0
SOFT_RST  
R/W  
0
8.1.2  
Bit  
Logic Device Number Register (LDN) Index 07h  
Name R/W Default  
Description  
7-0 LDN  
R/W  
00h 00h: Select FDC device configuration registers.  
01h: Select UART 1 device configuration registers.  
02h: Select UART 2 device configuration registers.  
03h: Select Parallel Port device configuration registers.  
04h: Select Hardware Monitor device configuration registers.  
05h: Select KBC device configuration registers.  
06h: Select GPIO device configuration registers.  
07h: Select VID device configuration registers.  
08h: Select SPI device configuration registers.  
0ah: Select PME & ACPI device configuration registers.  
8.1.3  
Bit  
Chip ID Register Index 20h  
Name R/W Default  
Description  
7-0 CHIP_ID1  
R
06h Chip ID 1 of F71862FG.  
8.1.4  
Bit  
Chip ID Register Index 21h  
Name R/W Default  
Description  
Description  
Description  
Description  
7-0 CHIP_ID2  
R
01h Chip ID2 of F71862FG.  
8.1.5  
Bit  
Vendor ID Register Index 23h  
Name R/W Default  
7-0 VENDOR_ID1  
R
19h Vendor ID 1 of Fintek devices.  
8.1.6  
Bit  
Vendor ID Register Index 24h  
Name R/W Default  
7-0 VENDOR_ID2  
R
34h Vendor ID 2 of Fintek devices.  
8.1.7  
Bit  
Software Power Down Register Index 25h  
Name R/W Default  
7-6 Reserved  
Reserved  
-
-
Reserved  
5
R/W  
0
Dummy register.  
72  
July, 2008  
V.28P  
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