F71862
7-6 VSBLED_SEL
5-4 VDDLED_SEL
R/W 2’b00
VSBLED function select, powered by VSB.
00: VSBLED always output low.
01: VSBLED tri-state
10: VSBLED output 0.5Hz clock.
11: VSBLED output 1Hz clock.
( clock output is inverse with VDDLED clock output )
R/W 2’b00
VDDLED function select, powered by VDD.
00: VDDLED always output low.
01: VDDLED tri-state
10: VDDLED output 0.5Hz clock.
11: VDDLED output 1Hz clock.
( clock output is inverse with VSBLED clock output )
3
2
1
0
GPIO33_SEL
GPIO32_SEL
GPIO31_SEL
GPIO30_SEL
R/W
R/W
R/W
R/W
0
0
0
0
0: RSMRST#/GPIO33 functions as RSMRST#.
1: RSMRST#/GPIO33 functions as GPIO33.
0: PWROK/GPIO32 functions as PWROK.
1: PWROK/GPIO32 functions as GPIO32.
0: PS_ON#/GPIO31 functions as PS_ON#.
1: PS_ON#/GPIO31 functions as GPIO31.
0: S3#/GPIO30 functions as S3#.
1: S3#/GPIO30 functions as GPIO30.
8.1.13 Multi Function Select 3 Register Index 2Bh (Powered by VSB3V)
Bit
Name
R/W Default
Description
7
6
Reserved
R/W
R/W
0
0
Dummy register.
GPIO16_SEL
GPIO15_SEL
0: GPIO16/LED_VCC functions as GPIO16.
1: GPIO16/LED_VCC functions as LED_VCC.
5
4
R/W
R/W
0
0
When register ALERT_GP_EN is 0, the register functions as:
0: GPIO15/LED_VSB/ALERT# functions as GPIO15.
1: GPIO15/LED_VSB/ALERT# functions as LED_VSB.
GPIO14_SEL
0: GPIO14/FWH_DIS/WDTRST# functions as GPIO14 when SPI is disabled.
1: GPIO14/FWH_DIS/WDTRST# functions as WDTRST# when SPI is
disabled.
3
2
GPIO13_SEL
GPIO12_SEL
R/W
R/W
0
0
0: GPIO13/SPI_MOSI/BEEP functions as GPIO13 when SPI is disabled.
1: GPIO13/SPI_MOSI/BEEP functions as BEEP when SPI is disabled.
0: GPIO12/SPI_MISO/FANCTRL1_1 functions as GPIO12 when SPI is
disabled.
1: GPIO12/SPI_NISO/FANCTRL1_1 functions as FANCTRL1_1 when SPI is
disabled.
1-0 Reserved
R/W
0
Reserved
8.1.14 Multi Function Select 4 Register Index 2Ch (Powered by VSB3V)
Bit Name R/W Default Description
75
July, 2008
V.28P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
