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F71862FG 参数 Datasheet PDF下载

F71862FG图片预览
型号: F71862FG
PDF下载: 下载PDF文件 查看货源
内容描述: 超级硬件监控+ LPC I / O [Super Hardware Monitor + LPC I/O]
分类和应用: 监控PC
文件页数/大小: 110 页 / 837 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F71862  
8. Register Description  
The configuration register is used to control the behavior of the corresponding devices. To configure  
the register, using the index port to select the index and then writing data port to alter the parameters. The  
default index port and data port are 0x4E and 0x4F respectively. Pull down the SOUT1 pin to change the  
default value to 0x2E/0x2F. To enable configuration, the entry key 0x87 must be written to the index port.  
To disable configuration, write exit key 0xAA to the index port. Following is a example to enable  
configuration and disable configuration by using debug.  
-o 4e 87  
-o 4e 87  
-o 4e aa  
( enable configuration )  
( disable configuration )  
The Following is a register map (total devices) grouped in hexadecimal address order, which shows a  
summary of all registers and their default value. Please refer each device chapter if you want more detail  
information.  
Global Control Registers  
“-“ Reserved or Tri-State  
Global Control Registers  
Register  
0x[HEX]  
Register Name  
Default Value  
MSB  
LSB  
02  
07  
20  
21  
23  
24  
25  
26  
27  
28  
29  
2A  
2B  
2C  
2D  
Software Reset Register  
-
-
0
0
0
0
0
-
-
-
-
-
-
0
Logic Device Number Register (LDN)  
Chip ID Register  
0
0
0
0
0
-
0
0
0
0
1
0
-
0
0
0
1
1
0
-
0
0
0
1
0
0
-
0
1
0
0
1
0
-
0
1
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
Chip ID Register  
Vender ID Register  
Vender ID Register  
Software Power Down Register  
UART IRQ Sharing Register  
ROM Address Select Register  
Power LED Function Select Register  
Multi Function Select 1 Register  
Multi Function Select 2 Register  
Multi Function Select 3 Register  
Multi Function Select 4 Register  
Wakeup Control Register  
0
0
-
-
0/1 1/0 1/0 0/1 0/1 0/1  
-
-
-
0
-
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
-
0
0
0
0
-
0
0
0
0
-
0
0
0
0
0
0
0
1
68  
July, 2008  
V.28P  
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