F71862
00: The OVT# will be low active level mode.
01: The OVT# will be high active level mode.
10: The OVT# will indicate by 1Hz LED function.
11: The OVT# will indicate by (400/800HZ) BEEP output.
Dummy register.
0
5-4
OVT_MODE
R/W
3
2
Reserved
R/W
R/W
0
0
0: Disable case open event output via PME.
1: Enable case open event output via PME.
CASE_SMI_EN
00: The ALERT# will be low active level mode.
01: The ALERT# will be high active level mode.
10: The ALERT# will indicate by 1Hz LED function.
11: The ALERT# will indicate by (400/800HZ) BEEP output.
0
1-0
ALERT_MODE
R/W
Configuration Register Index 03h
Bit
7-1
0
Name
R/W Default
Description
Return 0 when read.
Reserved
CASE_STS
R/W
R/W
0
0
Case open event status, write 1 to clear if case open event cleared.
Configuration Register Index 0Ah
Bit
Name
R/W Default
Description
Reserved.
7-6
Reserved
-
00
0
Set 1 to enable IIR for AMDSI/PECI reading.
The reading will be more stable.
Reserved.
5
4
T1_IIR_EN
Reserved
R/W
R/W
0
0
PECI (Vtt) voltage select.
00: Vtt is 1.23V
3-2
1-0
VTT_SEL
R/W
R/W
01: Vtt is 1.13V
10: Vtt is 1.00V
11: Vtt is 1.00V
CPU Temperature Measurement method.
00: with external diode.
01: with PECI interface.
10: with AMDSI interface.
11: reserved.
00
MEAS_TYPE
Configuration Register Index 0Bh (MEAS_TYPE == 2’b01)
Bit
Name
R/W Default
Description
Select the Intel CPU socket number.
0000: no CPU presented. PECI host will use Ping() command to find CPU
address.
0
0001: CPU is in socket 0, i.e. PECI address is 0x30.
0010: CPU is in socket 0, i.e. PECI address is 0x31.
0100: CPU is in socket 0, i.e. PECI address is 0x32.
1000: CPU is in socket 0, i.e. PECI address is 0x33.
Otherwise are reserved.
7-4
CPU_SEL
R/W
Reserved.
3-1
0
Reserved
-
0
0
If the CPU selected is dual core. Set this register 1 to read the temperature
of domain1.
DOMAIN1_EN
R/W
Configuration Register Index 0Bh (MEAS_TYPE ==2’b10)
Bit Name R/W Default
Description
50
July, 2008
V.28P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
