F71869A
A one enables the corresponding interrupt status bit for PME#
interrupt.
1
0
EN_FAN2_PME R/W
EN_FAN1_PME R/W
0
0
Set this bit 1 to enable PME# function for Fan2.
A one enables the corresponding interrupt status bit for PME#
interrupt.
Set this bit 1 to enable PME# function for Fan1.
6.6.51 FAN Interrupt Status Register ⎯ Index 91h
Bit
Name
R/W Default
Description
7-3
Reserved
R
0
Reserved
This bit is set when the fan3 count exceeds the count limit. Write 1 to
clear this bit, write 0 will be ignored.
2
1
0
FAN3_STS
FAN2_STS
FAN1_STS
R/W
--
This bit is set when the fan2 count exceeds the count limit. Write 1 to
clear this bit, write 0 will be ignored.
R/W
R/W
--
--
This bit is set when the fan1 count exceeds the count limit. Write 1 to
clear this bit, write 0 will be ignored.
6.6.52 FAN Real Time Status Register ⎯ Index 92h
Bit
Name
R/W Default
Description
7-3
Reserved
--
0
Reserved
This bit set to high mean that fan3 count can’t meet expect count over
than SMI time(CR9F) or when duty not zero but fan stop over then 3
sec.
2
1
0
FAN3_EXC
FAN2_EXC
FAN1_EXC
R
--
This bit set to high mean that fan2 count can’t meet expect count over
than SMI time(CR9F) or when duty not zero but fan stop over then 3
sec.
R
R
--
--
This bit set to high mean that fan1 count can’t meet expect count over
than SMI time(CR9F) or when duty not zero but fan stop over then 3
sec.
6.6.53 FAN BEEP# Enable Register ⎯ Index 93h
Bit
Name
R/W Default
Description
FULL_WITH_
T3_EN
7
R/W
R/W
0
0
Set one will enable FAN to force full speed when T3 over high limit.
FULL_WITH_
T2_EN
6
Set one will enable FAN to force full speed when T2 over high limit.
86
Oct., 2011
V0.19P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
