F71869A
6.6.3 Base Address Low Register ⎯ Index 61h
Bit Name R/W Default
7-0 BASE_ADDR_LO R/W
Description
95h The LSB of Hardware Monitor base address.
6.6.4 IRQ Channel Select Register ⎯ Index 70h
Bit
7-4
3-0
Name
R/W Default
Description
Reserved
SELHMIRQ
-
-
Reserved.
R/W 0000 Select the IRQ channel for Hardware Monitor.
Before the device registers, the following is a register map order which shows a summary of all
registers. Please refer each one register if you want more detail information.
Register CR01 ~ CR03 Æ Configuration Registers
Register CR0A ~ CR0F Æ PECI/TSI Control Register
Register CR10 ~ CR37 Æ Voltage Setting Register
Register CR40 ~ CR4F Æ PECI 3.0 Command and Register
Register CR60 ~ CR8E Æ Temperature Setting Register
Register CR90 ~ CRDF Æ Fan Control Setting Register
ÆFan1 Detail Setting CRA0 ~ CRAF
ÆFan2 Detail Setting CRB0 ~ CRBF
ÆFan3 Detail Setting CRC0 ~ CRCF
6.6.5 Configuration Register ⎯ Index 01h
Bit
7-3
2
Name
R/W Default
Description
Reserved
-
0
0
Reserved
POWER_DOWN R/W
Hardware monitor function power down.
Set one to enable startup of fan monitoring operations; a zero puts the
part in standby mode.
1
0
FAN_START
V_T_START
R/W
R/W
1
1
Set one to enable startup of temperature and voltage monitoring
operations; a zero puts the part in standby mode.
6.6.6 Configuration Register ⎯ Index 02h
Bit
Name
R/W Default
Description
Dummy register.
7
Reserved
R/W
0
0
0: Disable case open event output via BEEP.
1: Enable case open event output via BEEP.
6
CASE_BEEP_EN R/W
71
Oct., 2011
V0.19P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
