F71869A
4.1 Power Pins
Pin No.
Pin Name
Type
Description
4,37
3VCC
P
Power supply voltage input with 3.3V (Support OVP)
5V stand by power input. Nomally the 5V stand by
power source is from ATX Power directly.
3.3V internal standby power regulates from 5VSB,
couple this pin with capacitor (0.1u) to ground for inter
capacitance compensation. Besides, this pin can be an
output pin to provide little current for Battery
application when system enters ERP (G3’ like) state.
(Detail pleaser refer application circuit)
Battery voltage input
45
68
5VSB(5VA)
P
I_VSB3V
P
86
VBAT
AGND(D-)
3VSB
P
P
P
P
88
99
Analog GND
Analog Stand-by power supply voltage input 3.3V
Digital GND
20, 48, 73, 117
GND
4.2 LPC Interface
Pin No.
29
Pin Name
LRESET#
LDRQ#
Type
INst,5v
PWR
Description
3VCC Reset signal. It can connect to PCIRST# signal on the host.
3VCC Encoded DMA Request signal.
30
O16
31
SERIRQ
I/O16t-u47k
3VCC Serial IRQ input/Output.
Indicates start of a new cycle or termination of a broken
32
LFRAM#
INst-u47k
3VCC
cycle.
These signal lines communicate address, control, and data
3VCC information over the LPC bus between a host and a
peripheral.
33-36
LAD[0:3]
I/O16t-u47k
38
39
PCICLK
CLKIN
INst
INst
3VCC 33MHz PCI clock input.
System clock input. According to the input frequency
3VCC
24/48MHz.
4.3 FDC
Pin No. Pin Name
Type
PWR
Description
Default General Purpose IO.
GPIO30
I/OD14st,5v
Drive Density Select.
3VCC
7
Set to 1 - High data rate.(500Kbps, 1Mbps)
Set to 0 – Low data rate. (250Kbps, 300Kbps)
FDC function is selected by register setting.
Default General Purpose IO.
OD14,5v
DENSEL#
GPIO31
I/OD14st,5v
OD14,5v
3VCC
3VCC
Motor A On. When set to 0, this pin enables disk drive 0.
This is an open drain output.
8
MOA#
FDC function is selected by register setting.
Default General Purpose IO.
GPIO32
I/OD14st,5v
OD14,5v
9
Drive Select A. When set to 0, this pin enables disk drive A.
DRVA#
12
Oct., 2011
V0.19P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
