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FTGL2025S1TUS 参数 Datasheet PDF下载

FTGL2025S1TUS图片预览
型号: FTGL2025S1TUS
PDF下载: 下载PDF文件 查看货源
内容描述: GPON OLT B类+尾纤符合RoHS收发器 [GPON OLT Class B+ Pigtailed RoHS Compliant Transceiver]
分类和应用:
文件页数/大小: 10 页 / 92 K
品牌: FINISAR [ FINISAR CORPORATION. ]
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FTGL2025S1TUx Pigtailed SFF Product Specification -April, 2008
Finisar
IX
Digital Diagnostic Functions
Finisar FTGL2025S1TUx transceivers support the 2-wire serial communication protocol
as defined in the SFP MSA
1
.
The standard SFP serial ID provides access to identification information that describes
the transceiver’s capabilities, standard interfaces, manufacturer, and other information.
Additionally, Finisar transceivers provide a unique enhanced digital diagnostic
monitoring interface, which allows real-time access to device operating parameters such
as transceiver temperature, laser bias current, transmitted optical power, received optical
power and transceiver supply voltage. It also defines a sophisticated system of alarm and
warning flags, which alerts end-users when particular operating parameters are outside of
a factory-set normal range.
The SFP MSA defines a 256-byte memory map in E
2
PROM that is accessible over a
2-wire serial interface at the 8 bit address 1010000X (A0h). The digital diagnostic
monitoring interface makes use of the 8 bit address 1010001X (A2h), so the originally
defined serial ID memory map remains unchanged. The complete interface is described
in Finisar Application Note AN-2030: “Digital Diagnostics Monitoring Interface for SFP
Optical Transceivers”.
The operating and diagnostics information is monitored and reported by a Digital
Diagnostics Transceiver Controller (DDTC) inside the transceiver, which is accessed
through a 2-wire serial interface. When the serial protocol is activated, the serial clock
signal (SCL) is generated by the host. The positive edge clocks data into the SFP
transceiver into those segments of the E
2
PROM that are not write-protected. The
negative edge clocks data from the SFP transceiver. The serial data signal (SDA) is bi-
directional for serial data transfer. The host uses SDA in conjunction with SCL to mark
the start and end of serial protocol activation. The memories are organized as a series of
8-bit data words that can be addressed individually or sequentially.
For more information, please contact Finisar.
Digital diagnostics for the FTGL2025S1TUx are internally calibrated by default.
©
Finisar Corporation April 2, 2008 Rev.A.1
Page 7