FTGL2025S1TUx Pigtailed SFF Product Specification -April, 2008
F i n i s a r
I.
Pin Descriptions
Pin Symbol
Description/Comments Interface
Input/LVTTL; Active high and control by the host
1
B-M Reset B-M RX Reset
2
3
4
5
6
7
8
Reserved
RX GND
Reserved
Rx Vcc
RX GND
RX Vcc
RX SD
Reserved (no connect)
Reserved for future application
Receiver Ground.
Reserved (no connect)
Receive Vcc
MSA 2x5 standard
MSA 2x5 standard
MSA 2x5 standard
Reserved for future application
Output/LVTTL; Active high
Output/LVPECL; DC coupled termination needed on the
host
Output/LVPECL; DC coupled termination needed on the
host
9
RX D-
RX D+
MSA 2x5 standard
MSA 2x5 standard
10
11
12
13
14
15
16
TX Vcc
TX GND
TX Dis
TX D+
TX D-
TX GND
MSA 2x5 standard
MSA 2x5 standard
MSA 2x5 standard
MSA 2x5 standard
MSA 2x5 standard
Transmitter Ground
Input/LVTTL; Active high and control by the host
Input/CML AC coupled with internal 100Ohms termination
Input/CML AC coupled with internal 100Ohms termination
Input; Recommend a tri-state buffer with 10K pull up on the
host
17
SCL
Serial clock interface
18
19
20
SDA
TX Fail
TX GND
Serial data interface
Laser safety shut down
TX Ground
I/O; Open drain. Recommend 1K pull up on the host
Output/LVTTL open drain with internal pull up
MS
20 19 18 17 16
15 14 13 12 11
TOP VIEW
2 3 4 5 6 7 8 9 10
1
MS
SFF Pinout Top View (SFF MSA dimension but with bi-directional pigtail)
© Finisar Corporation April 2, 2008 Rev.A.1
Page 2
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