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MC81F4432Q 参数 Datasheet PDF下载

MC81F4432Q图片预览
型号: MC81F4432Q
PDF下载: 下载PDF文件 查看货源
内容描述: ABOV半导体的8位单芯片微控制器产品 [ABOV SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS]
分类和应用: 半导体微控制器
文件页数/大小: 198 页 / 4293 K
品牌: FINECHIPS [ FINECHIPS ]
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MC81F4432  
Mode 0 Transmit Procedure  
1. Set Rx/Tx pins to Alternative mode.  
2. Set the baud rate  
- Select the UART clock by setting the UCLK(UCONL.[3-2]) bits.  
- Set the BRDAT register properly  
3. Select mode 0 by setting the USM(UCONH.[7-6]) bits.  
4. Write transmission data to the UDA.  
After finish above steps, the data transmission will be started. And after finish the transmission, both  
UTIR(IRQL.3) and UTIF(INTFL.0) bits are set to 1by hardware.  
Mode 0 Receive Procedure  
1. Set the baud rate  
- Select the UART clock by setting the UCLK(UCONL.[3-2]) bits.  
- Set the BRDAT register properly  
2. Select mode 0 by setting the USM(UCONH.[7-6]) bits.  
3. Clear the receive interrupt request flag bit URIR(IRQL.4).  
4. Set the SDR(UCONH.4 / UART receive enable bit) by „1‟.  
Right after finish above steps, the shift clock will be output to the TxD (R15) pin and receiving is  
started at the RxD (R14) pin. After finish receiving, both URIR(IRQL.4) and URIF(INTFL.1) bits are set  
to "1" by hardware.  
Uart Mode 1  
Tx  
Clock  
Write to Shift Register (UDAT)  
Shift  
TxD  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
Stop Bit  
Start Bit  
UTIR  
Rx  
Clock  
RxD  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
Stop Bit  
Start Bit  
Bit Detect Sample Time  
Shift  
URIR  
Figure 24-3 Timing Diagram for UART Mode 1 Operation  
October 19, 2009 Ver.1.35  
153  
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