MC81F4x16
18.2 Timer 0 8-Bit Mode
T0CS
T0OVIE
Timer 0 overflow INT enable
fxx/2048
fxx/512
fxx/128
fxx/32
fxx/16
fxx/8
Data BUS
8
OVF
T0OVIR
T0 Overflow
Interrupt
Timer 0 Overflow INT request
M
U
X
T0OVIF
T0CC
Match signal
fxx/4
fxx/2
fxt
8-Bit Up Counter
(Read - only)
Clear
R
T0CR
Clear
T0MIE
EC0
Timer 0 INT enable
M
U
X
Counter stop
Match
8-Bit Comparator
T0MIR
T0 Match
Interrupt
Timer 0 Match INT request
T0O/PWM0O
M
U
X
EXT1
T0MIF
T0MS
Timer 0 Buffer Register
Timer 0 Data Register
T0CC
Overflow signal
Match signal
EINT0L
T0DR
8
EXT1
Interrupt
Data BUS
Figure 18-1 8-bit Timer 0 Block Diagram
Timer 0 has the following functional components:
-
-
-
-
-
-
Clock frequency divider (fxx divided by 2048, 512, 128, 32, 16, 8, 4, 2, fxt) with multiplexer
External clock input pin, EC0 (R02)
I/O pins for capture input, EXT1 (R03) or PWM or match output PWM0O/T0O (R03)
8-bit counter (T0CR), 8-bit comparator, and 8-bit reference data register (T0DR)
Timer 0 status and control register (T0SCR)
Timer 0 overflow interrupt and match interrupt generation
116
October 19, 2009 Ver.1.35
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