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FDS6912 参数 Datasheet PDF下载

FDS6912图片预览
型号: FDS6912
PDF下载: 下载PDF文件 查看货源
内容描述: 双N沟道逻辑电平PWM优化的PowerTrench MOSFET [Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET]
分类和应用: 晶体晶体管功率场效应晶体管开关脉冲光电二极管
文件页数/大小: 5 页 / 76 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
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FDS6912
July 2000
FDS6912
Dual N-Channel Logic Level PWM Optimized PowerTrench
MOSFET
General Description
These N-Channel Logic Level MOSFETs have been
designed specifically to improve the overall efficiency of
DC/DC converters using either synchronous or
conventional switching PWM controllers.
These MOSFETs feature faster switching and lower
gate charge than other MOSFETs with comparable
RDS(ON) specifications.
The result is a MOSFET that is easy and safer to drive
(even at very high frequencies), and DC/DC power
supply designs with higher overall efficiency.
Features
6 A, 30 V.
R
DS(ON)
= 0.028
@ V
GS
= 10 V
R
DS(ON)
= 0.042
@ V
GS
= 4.5 V.
Optimized for use in switching DC/DC converters
with PWM controllers
Very fast switching.
Low gate charge
D1
D1
D2
D2
S1
G1
5
6
7
Q1
4
3
2
Q2
SO-8
S2
8
1
G2
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Drain-Source Voltage
Gate-Source Voltage
Drain Current
– Continuous
– Pulsed
T
A
=25 C unless otherwise noted
o
Parameter
Ratings
30
±25
(Note 1a)
Units
V
V
A
W
6
20
2
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
1.6
1
0.9
-55 to +150
°C
T
J
, T
stg
Operating and Storage Junction Temperature Range
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
78
40
°C/W
°C/W
Package Marking and Ordering Information
Device Marking
FDS6912
Device
FDS6912
Reel Size
13’’
Tape width
12mm
Quantity
2500 units
2000
Fairchild Semiconductor Corporation
FDS6912 Rev F (W)