欢迎访问ic37.com |
会员登录 免费注册
发布采购

FDS3672_NL 参数 Datasheet PDF下载

FDS3672_NL图片预览
型号: FDS3672_NL
PDF下载: 下载PDF文件 查看货源
内容描述: [Power Field-Effect Transistor, 7.5A I(D), 100V, 0.023ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, MS-012AA, SO-8]
分类和应用: 开关光电二极管晶体管
文件页数/大小: 11 页 / 196 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
 浏览型号FDS3672_NL的Datasheet PDF文件第1页浏览型号FDS3672_NL的Datasheet PDF文件第3页浏览型号FDS3672_NL的Datasheet PDF文件第4页浏览型号FDS3672_NL的Datasheet PDF文件第5页浏览型号FDS3672_NL的Datasheet PDF文件第6页浏览型号FDS3672_NL的Datasheet PDF文件第7页浏览型号FDS3672_NL的Datasheet PDF文件第8页浏览型号FDS3672_NL的Datasheet PDF文件第9页  
FDS3672
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
B
VDSS
I
DSS
I
GSS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I
D
= 250µA, V
GS
= 0V
V
DS
= 80V
V
GS
= 0V
V
GS
=
±20V
T
C
=
150
o
C
100
-
-
-
-
-
-
-
-
1
250
±100
V
µA
nA
On Characteristics
V
GS(TH)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= 250µA
I
D
= 7.5A, V
GS
= 10V
r
DS(ON)
Drain to Source On Resistance
I
D
= 6.8A, V
GS
= 6V
I
D
= 7.5A, V
GS
= 10V,
T
C
= 150
o
C
2
-
-
-
-
0.019
0.023
0.035
4
0.023
0.028
0.043
V
Dynamic Characteristics
C
ISS
C
OSS
C
RSS
Q
g(TOT)
Q
g(TH)
Q
gs
Q
gs2
Q
gd
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge at 10V
Threshold Gate Charge
Gate to Source Gate Charge
Gate Charge Threshold to Plateau
Gate to Drain “Miller” Charge
V
DS
= 25V, V
GS
= 0V,
f = 1MHz
V
GS
= 0V to 10V
V
GS
= 0V to 2V
V
DD
= 50V
I
D
= 7.5A
I
g
= 1.0mA
-
-
-
-
-
-
-
-
2015
285
70
28
4
10
6.8
6
-
-
-
37
6
-
-
-
pF
pF
pF
nC
nC
nC
nC
nC
Switching Characteristics
(V
GS
= 10V)
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
V
DD
= 50V, I
D
= 4A
V
GS
= 10V, R
GS
= 10Ω
-
-
-
-
-
-
-
14
20
37
27
-
51
-
-
-
-
96
ns
ns
ns
ns
ns
ns
Drain-Source Diode Characteristics
V
SD
t
rr
Q
RR
Source to Drain Diode Voltage
Reverse Recovery Time
Reverse Recovered Charge
I
SD
= 7.5A
I
SD
= 4A
I
SD
= 7.5A, dI
SD
/dt= 100A/µs
I
SD
= 7.5A, dI
SD
/dt= 100A/µs
-
-
-
-
-
-
-
-
1.25
1.0
55
90
V
V
ns
nC
Notes:
1:
Starting T
J
= 25°C, L = 13mH, I
AS
= 8A.
2:
R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the
drain pins. R
θJC
is guaranteed by design while R
θCA
is determined by the user’s board design.
3:
R
θJA
is measured with 1.0 in
2
copper on FR-4 board
©2003 Fairchild Semiconductor Corporation
FDS3672 Rev. B