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FDC658P 参数 Datasheet PDF下载

FDC658P图片预览
型号: FDC658P
PDF下载: 下载PDF文件 查看货源
内容描述: 单P沟道逻辑电平MOSFET PowerTrenchTM [Single P-Channel, Logic Level, PowerTrenchTM MOSFET]
分类和应用: 晶体晶体管开关光电二极管
文件页数/大小: 8 页 / 250 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
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ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Zero Gate Voltage Drain Current
V
GS
= 0 V, I
D
= -250 µA
I
D
= -250 µA, Referenced to 25
o
C
V
DS
= -24 V, V
GS
= 0 V
T
J
= 55
o
C
V
GS
= 20 V, V
DS
= 0 V
V
GS
= -20 V, V
DS
= 0 V
-30
-22
-1
-10
100
-100
V
mV/
o
C
µA
µA
nA
nA
BV
DSS
/
T
J
I
DSS
I
GSSF
I
GSSR
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
ON CHARACTERISTICS
(Note 2)
V
GS(th)
Gate Threshold Voltage
Gate Threshold VoltageTemp.Coefficient
Static Drain-Source On-Resistance
V
DS
= V
GS
, I
D
= -250 µA
I
D
= -250 µA, Referenced to 25 C
V
GS
= -10 V, I
D
= -4.0 A
T
J
= 125 C
V
GS
= -4.5 V, I
D
= -3.4 A
o
o
-1
-1.7
4.1
0.041
0.058
0.06
-3
V
mV/
o
C
V
GS(th)
/
T
J
R
DS(ON)
0.05
0.08
0.075
I
D(on)
g
FS
C
iss
C
oss
C
rss
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
I
S
V
SD
Notes:
On-State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Continuous Source Diode Current
Drain-Source Diode Forward Voltage
V
GS
= -10 V, V
DS
= -5 V
V
DS
= -5V, I
D
= -4 A
V
DS
= -15 V, V
GS
= 0 V,
f = 1.0 MHz
-20
9
750
220
100
A
S
pF
pF
pF
22
25
38
27
12
ns
ns
ns
ns
nC
nC
nC
-1.3
A
V
DYNAMIC CHARACTERISTICS
SWITCHING CHARACTERISTICS
(Note 2)
V
DD
= -15 V, I
D
= -1 A,
V
GS
= -10 V, R
GEN
= 6
12
14
24
16
V
DS
= -15 V, I
D
= -4.0 A,
V
GS
= -5 V
8
1.8
3
DRAIN-SOURCE DIODE CHARACTERISTICS
V
GS
= 0 V, I
S
= -1.3 A
(Note 2)
-0.76
-1.2
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed
by design while R
θ
CA
is determined by the user's board design.
a. 78
o
C/W when mounted on a 1 in
2
pad of 2oz Cu on FR-4 board.
b. 156
o
C/W when mounted on a minimum pad of 2oz Cu on FR-4 board.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
FDC658P Rev.C