Figure 37. Startup Control without Overshoot
Figure 39. Input and Output Current Near Input
Voltage Peak Zero Cross
8. THD Optimization: Total Harmonic Distortion (THD)
is the factor that dictates how closely input current
shape matches sinusoidal form. The turn-on time of the
PFC controller is almost constant over one AC line
period due to the extremely low feedback control
response. The turn-off time is determined by the current
decrease slope of the boost inductor made by the input
voltage and output voltage. Once inductor current
becomes zero, resonance between COSS and the boost
inductor makes oscillating waveforms at the drain pin
and auxiliary winding. By checking the auxiliary winding
voltage through the ZCD pin, the controller can check
the zero current of boost inductor. At the same time, a
minor delay is inserted to determine the valley position
of drain voltage. The input and output voltage difference
is at its maximum at the zero cross point of AC input
voltage. The current decrease slope is steep near the
zero cross region and more negative inductor current
flows during a drain voltage valley detection time. Such
a negative inductor current cancels down the positive
current flows and input current becomes zero, called
“zero-cross distortion” in PFC.
To improve this, lengthened turn-on time near the zero
cross region is a well-known technique, though the
method may vary and may be proprietary. FAN7930C
optimizes this by sourcing current through the ZCD pin.
Auxiliary winding voltage becomes negative when the
MOSFET turns on and is proportional to input voltage.
The negative clamping circuit of ZCD outputs the
current to maintain the ZCD voltage at a fixed value.
The sourcing current from the ZCD is directly
proportional to the input voltage. Some portion of this
current is applied to the internal sawtooth generator,
together with a fixed-current source. Theoretically, the
fixed-current source and the capacitor at sawtooth
generator determine the maximum turn-on time when no
current is sourcing at ZCD clamp circuit and available
turn-on time gets shorter proportional to the ZCD
sourcing current.
Figure 38. Input and Output Current Near Input
Voltage Peak
Figure 40. Circuit of THD Optimizer
© 2010 Fairchild Semiconductor Corporation
FAN7930C • Rev. 1.0.0
www.fairchildsemi.com
15
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