Internal Block Diagram
FAN7390
8
7
VB
UVLO
R
HO
R
1
NOISE
CANCELLER
HIN
S
Q
200K
6
5
VS
VDD
UVLO
VSS/COM
LEVEL
SHIFT
DELAY
4
LO
2
LIN
200K
3
COM
FAN7390 Rev.06
Figure 3. Functional Block Diagram (Referenced 8-SOP/DIP)
13
12
VB
FAN7390M1
UVLO
R
HO
R
1
HIN
NOISE
CANCELLER
S
Q
200K
11
7
VS
VDD
UVLO
VSS/COM
LEVEL
SHIFT
DELAY
6
LO
2
3
LIN
VSS
200K
5
COM
Pin 4, 8, 9, 10 and 14 are no connection
FAN7390M1 Rev.06
Figure 4. Functional Block Diagram (Referenced 14-SOP)
© 2008 Fairchild Semiconductor Corporation
FAN7390 Rev. 1.0.2
www.fairchildsemi.com
3