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ES29DS800E-90RTG 参数 Datasheet PDF下载

ES29DS800E-90RTG图片预览
型号: ES29DS800E-90RTG
PDF下载: 下载PDF文件 查看货源
内容描述: 的8Mbit ( 1M ×8 / 512K ×16 )的CMOS 3.0伏只,引导扇区闪存 [8Mbit(1M x 8/512K x 16) CMOS 3.0 Volt-only, Boot Sector Flash Memory]
分类和应用: 闪存
文件页数/大小: 50 页 / 680 K
品牌: EXCELSEMI [ EXCEL SEMICONDUCTOR INC. ]
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E S I  
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Excel Semiconductor inc.  
Erase Suspend mode. Toggle Bit I may be read at  
any address, and is valid after the rising edge of the  
final WE# pulse in the command sequence ( prior to  
the program or erase operation), and during the sec-  
tor erase time-out. During an Embedded Program or  
Erase algorithm operation, successive read cycles to  
any address cause DQ6 to toggle. The system may  
use either OE# or CE# to control the read cycles.  
When the operation is complete, DQ6 stops tog-  
gling.  
START  
Read DQ7-DQ0  
Addr = VA  
Yes  
DQ7 = Data ?  
No  
No  
DQ5 = 1 ?  
The system can use DQ6 and DQ2 together to  
determine whether a sector is actively erasing or is  
erase-suspended. When the device is actively eras-  
ing (that is, the Embedded Erase algorithm is in  
progress), DQ6 toggles. When the device enters the  
Erase Suspend mode, DQ6 stops toggling. How-  
ever, the system must also use DQ2 to determine  
which sectors are erasing or erase-suspended.  
Alternatively, the system can use DQ7(see the sub-  
section on DQ7:Data# Polling). DQ6 also toggles  
during the erase-suspend-program mode, and stops  
toggling once the Embedded Program algorithm is  
complete.  
Yes  
Read DQ7-DQ0  
Addr = VA  
Yes  
DQ7 = Data ?  
No  
FAIL  
PASS  
Notes:  
1. VA = Valid address for programming. During a sector erase  
operation, a valid address is any sector address within the  
sector being erased. During chip erase, a valid address in  
any non-protected sector address.  
Table 6 shows the outputs for Toggle Bit I on DQ6.  
Fig. 10 shows the toggle bit algorithm. Fig. 23 in the  
“AC Characteristics” section shows the toggle bit  
timing diagrams. Fig. 24 shows the differences  
between DQ2 and DQ6 in graphical form. See also  
the subsection on DQ2 : (Toggle Bit II).  
2. DQ7 should be rechecked even if DQ5 = “1” because  
DQ7 may change simultaneously with DQ5  
Figure 9. Data# Polling Algorithm  
Toggling on the Protected Sectors  
After an erase command sequence is written, if all  
sectors selected for erasing are protected, DQ6 tog-  
gles for approximately 1.8us, then returns to reading  
array data. If not all selected sectors are protected,  
the Embedded Erase algorithm erases the unpro-  
tected sectors, and ignores the selected sectors that  
are protected. If a program address falls within a  
protected sector, DQ6 toggles for approximately  
250ns after the program command sequence is writ-  
ten, then returns to reading array data.  
RY/BY# ( READY/BUSY# )  
The RY/BY# is a dedicated, open-drain output pin  
which indicates whether an Embedded Algorithm is  
in progress or complete. The RY/BY# status is valid  
after the rising edge of the final WE# pulse in the  
command sequence. Since RY/BY# is an open-  
drain output, several RY/BY# pins can be tied  
together in parallel with a pull-up resistor to Vcc. If  
the output is low (Busy), the device is actively eras-  
ing or programming. (This includes programming in  
the Erase Suspend mode.) If the output is high  
(Ready), the device is in the read mode, the  
standby mode, or in the erase-suspend-read mode.  
Table 6 shows the outputs for RY/BY#.  
DQ2 ( TOGGLE BIT II )  
The “Toggle Bit II” on DQ2, when used with DQ6,  
indicates whether a particular sector is actively eras-  
ing (that is, the Embedded Erase algorithm is in  
progress), or whether that sector is erase-sus-  
pended. Toggle Bit II is valid after the rising edge of  
the final WE# pulse in the command sequence DQ2  
DQ6 ( TOGGLE BIT I )  
Toggle Bit I on DQ6 indicates whether an Embed-  
ded Program or Erase algorithm is in progress or  
complete, or whether the device has entered the  
23  
Rev. 1D January 5, 2006  
ES29LV800D  
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