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XRT86L30IV 参数 Datasheet PDF下载

XRT86L30IV图片预览
型号: XRT86L30IV
PDF下载: 下载PDF文件 查看货源
内容描述: 单一T1 / E1 / J1成帧器/ LIU COMBO [SINGLE T1/E1/J1 FRAMER/LIU COMBO]
分类和应用:
文件页数/大小: 284 页 / 1793 K
品牌: EXAR [ EXAR CORPORATION ]
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XRT86L30  
SINGLE T1/E1/J1 FRAMER/LIU COMBO  
REV. 1.0.1  
TABLE 132: DATA  
L
INK  
STATUS  
REGISTER 2  
R
EGISTER 546  
IT  
D
ATA  
L
INK  
STATUS  
R
EGISTER 2 (DLSR2)  
HEX ADDRESS: 0X0B16  
B
FUNCTION  
TYPE  
D
EFAULT  
DESCRIPTION-OPERATION  
5
RxSOT  
TxEOT  
RxEOT  
RUR  
0
Receive HDLC2 Start of Reception Interrupt Status  
Indicates if the Receive HDLC2 Start of Reception interrupt has  
occurred since the last read of this register. Receive HDLC2 Con-  
troller will declare this interrupt when it has started to receive a data  
link message.  
0 = Receive HDLC2 Start of Reception interrupt has not occurred  
since the last read of this register  
1 = Receive HDLC2 Start of Reception interrupt has occurred since  
the last read of this register  
4
3
2
RUR  
RUR  
RUR  
0
0
0
Transmit HDLC2 End of Transmission Interrupt Status  
Indicates if the Transmit HDLC2 End of Transmission Interrupt has  
occurred since the last read of this register. Transmit HDLC2 Con-  
troller will declare this interrupt when it has completed its transmis-  
sion of a data link message.  
0 = Transmit HDLC2 End of Transmission interrupt has not occurred  
since the last read of this register  
1 = Transmit HDLC2 End of Transmission interrupt has occurred  
since the last read of this register  
Receive HDLC2 Controller End of Reception Interrupt Status  
Indicates if Receive HDLC2 End of Reception Interrupt has occurred  
since the last read of this register. Receive HDLC2 Controller will  
declare this interrupt once it has completely received a full data link  
message.  
0 = Receive HDLC2 End of Reception interrupt has not occurred  
since the last read of this register  
1 = Receive HDLC2 End of Reception Interrupt has occurred since  
the last read of this register  
FCS Error  
FCS Error Interrupt Status  
Indicates if the FCS Error Interrupt has occurred since the last read  
of this register. Receive HDLC2 Controller will declare this interrupt  
if it detects an error in the most recently received data message.  
0 = FCS Error interrupt has not occurred since last read of this regis-  
ter  
1 = FCS Error interrupt has occurred since last read of this register  
111  
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