XRT86L30
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO
TABLE 132: DATA
L
INK
STATUS
REGISTER 2
R
EGISTER 546
IT
D
ATA
L
INK
STATUS
R
EGISTER 2 (DLSR2)
HEX ADDRESS: 0X0B16
B
FUNCTION
TYPE
D
EFAULT
DESCRIPTION-OPERATION
1
Rx ABORT
RUR
0
Receipt of Abort Sequence Interrupt Status
Indicates if the Receipt of Abort interrupt has occurred since last
read of this register. Receive HDLC2 Controller will declare this
interrupt if it detects a string of seven (7) consecutive 1’s in the
incoming data link channel.
0 = Receipt of Abort Sequence interrupt has not occurred since last
read of this register
1 = Receipt of Abort Sequence interrupt has occurred since last
read of this register
0
RxIDLE
RUR
0
Receipt of Idle Sequence Interrupt Status
Indicates if the Receipt of Idle Sequence interrupt has occurred
since the last read of this register. The Receive HDLC2 Controller
will declare this interrupt if it detects the flag sequence octet (0x7E)
in the incoming data link channel.
0 = Receipt of Idle Sequence interrupt has not occurred since last
read of this register
1 = Receipt of Idle Sequence interrupt has occurred since last read
of this register.
TABLE 133: DATA
L
INK
INTERRUPT
ENABLE REGISTER 2
R
EGISTER 547
IT
D
ATA
L
INK
I
NTERRUPT
E
NABLE EGISTER 2 (DLIER2)
R
HEX ADDRESS: 0X0B17
B
FUNCTION
T
YPE
D
EFAULT
DESCRIPTION-OPERATION
7
Reserved
-
-
Reserved
Transmit HDLC2 Start of Transmission Interrupt Enable
6
5
4
3
2
TxSOT ENB
R/W
0
0 = Disables the Transmit HDLC2 Start of Transmission interrupt
1 = Enables the Transmit HDLC2 Start of Transmission interrupt
RxSOT ENB
TxEOT ENB
RxEOT ENB
FCS ERR ENB
R/W
R/W
R/W
R/W
0
0
0
0
Receive HDLC2 Start of Reception Interrupt Enable
0 = Disables the Receive HDLC2 Start of Reception interrupt
1 = Enables the Receive HDLC2 Start of Reception interrupt
Transmit HDLC2 End of Transmission Interrupt Enable
0 = Disables the Transmit HDLC2 End of Transmission interrupt
1 = Enables the Transmit HDLC2 End of Transmission interrupt
Receive HDLC2 End of Reception Interrupt Enable
0 = Disables the Receive HDLC2 End of Reception interrupt
1 = Enables the Receive HDLC2 End of Reception interrupt
FCS Error Interrupt Enable
0 = Disables FCS Error interrupt
1 = Enables FCS Error interrupt
112