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XRT86L30IV 参数 Datasheet PDF下载

XRT86L30IV图片预览
型号: XRT86L30IV
PDF下载: 下载PDF文件 查看货源
内容描述: 单一T1 / E1 / J1成帧器/ LIU COMBO [SINGLE T1/E1/J1 FRAMER/LIU COMBO]
分类和应用:
文件页数/大小: 284 页 / 1793 K
品牌: EXAR [ EXAR CORPORATION ]
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XRT86L30  
SINGLE T1/E1/J1 FRAMER/LIU COMBO  
REV. 1.0.1  
T
ABLE 123: SLIP  
B
UFFER  
I
NTERRUPT  
NABLE  
E
NABLE  
REGISTER (SBIER)  
R
EGISTER 537  
IT  
S
LIP  
BUFFER  
I
NTERRUPT  
E
R
EGISTER (SBIER)  
HEX ADDRESS: 0X0B09  
B
FUNCTION  
TYPE  
D
EFAULT  
DESCRIPTION-OPERATION  
7
TxFULL_ENB  
TxEMPT_ENB  
TxSLIP_ENB  
R/W  
R/W  
R/W  
0
Tx Interrupt Enable bit for slip buffer full  
Setting this bit enables interrupt when the elastic store fills and a  
frame is deleted.  
6
5
0
0
Tx Interrupt Enable bit for slip buffer empty  
Setting this bit enables interrupt when the elastic store empties and  
a frame is repeated.  
Tx Interrupt Enable bit for Slip buffer slip  
Setting this bit enables interrupt when the slip buffer slips.  
4-3 Reserved  
-
-
Reserved  
2
1
0
FULL_ENB  
EMPT_ENB  
SLIP_ENB  
R/W  
0
Interrupt Enable bit for slip buffer full  
Setting this bit enables interrupt when the elastic store fills and a  
frame is deleted.  
R/W  
R/W  
0
0
Interrupt Enable bit for slip buffer empty  
Setting this bit enables interrupt when the elastic store empties and  
a frame is repeated.  
Interrupt Enable bit for Slip buffer slip  
Setting this bit enables interrupt when the slip buffer slips.  
TABLE 124: RECEIVE  
L
OOPBACK  
C
ODE  
INTERRUPT AND  
STATUS  
REGISTER (RLCISR)  
R
EGISTER 538  
R
ECEIVE  
L
OOPBACK ODE NTERRUPT AND  
C
I
STATUS  
REGISTER (RLCISR)  
HEX ADDRESS: 0X0B0A  
B
IT  
F
UNCTION  
TYPE  
D
EFAULT  
DESCRIPTION-OPERATION  
7
6
5
AUXPSTAT  
R
0
AUXP state  
This bit indicates the status of receive AUXP pattern.  
AUXPINT  
RUR/WC  
R
0
0
AUXP state change interrupt  
1 = Indicates the receive AUXP status has changed.  
NONCRCSTAT  
CRC-4-to-non-CRC-4 interworking status  
This bit indicates the status of CRC-4 interworking status in  
MODENB mode.  
1 = CRC-4-to-non-CRC-4 interworking is established.  
4
3
NONCRCINT  
RXASTAT  
RUR/WC  
R
0
0
CRC-4-to-non-CRC-4 interworking interrupt  
1 = Indicates the interworking status has changed.  
Receive activation status  
This bit indicates the status of receive activation process. 1 = Indi-  
cates the loopback code activation is received.  
2
RXDSTAT  
R
0
Receive deactivation status  
This bit indicates the status of receive deactivation process. 1 = Indi-  
cates the loopback code deactivation is received.  
107  
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