MP8799
ELECTRICAL CHARACTERISTICS TABLE (CONT’D)
25°C
Parameter
Symbol
Min
Typ
Max
Units
Test Conditions/Comments
DIGITAL OUTPUTS
C
=15 pF
OUT
Logical “1” Voltage
Logical “0” Voltage
Tristate Leakage
V
V
I
DV -0.5
V
V
I
I
V
= 2 mA
= 4 mA
= 0 to DV
OH
DD
LOAD
0.4
+5
35
45
OL
OZ
LOAD
0
µA
ns
ns
ns
ns
ns
OUT
DD
1
Data Hold Time (See Figure 1.)
t
30
35
HLD
1
Data Valid Delay
t
DL
1
Write Pulse Width
t
40
80
0
WR
1
Multiplexer Address Setup Time
Multiplexer Address Hold Time
Delay from WR to Multiplexer
t
t
AS
AH
1
1
Enable
Power Down Time
Power Up Time
t
80
300
200
ns
ns
ns
MUXEN1
1
t
t
PD
PU
1
8
POWER SUPPLIES
Power Down (I
Operating Voltage (AV , DV
)
I
0.6
5
6
1.2
6.5
10
mA
V
mA
DD
PD-DD
)
V
DD
I
DD
4
DD
DD
Current (AV + DV
)
V
IN
= 2 V
DD
DD
NOTES:
1
Guaranteed. Not tested.
Tester measures code transition voltages by dithering the voltage of the analog input (V ). The difference between the measured
2
IN
code width and the ideal value (V /1024) is the DNL error (see Figure 4.). The INL error is the maximum distance (in LSBs) from
REF
the best fit line to any transition voltage (See Figure 7.).
See V input equivalent circuit (see Figure 9.).
3
4
5
6
7
IN
Clock specification to meet aperture specification (t ). Actual rise/fall time can be less stringent with no loss of accuracy.
AP
Specified values guarantee functional device. Refer to other parameters for accuracy.
System can clock MP8799 with any duty cycle as long as all timing conditions are met.
Input range where input is converted correctly into binary code. Input voltage outside specified range converts to zero or full scale
output.
8
DV and AV are connected through the silicon substrate. Connect together at the package.
DD
DD
Specificationsare subject to change without notice
ABSOLUTE MAXIMUM RATINGS (TA = +25°C unless otherwise noted)1, 2, 3
VDD (to GND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V
VREF(+), VREF(–), VREF1(–) . . . . . . . GND –0.5 to VDD +0.5 V
All AINs . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 to VDD +0.5 V
All Inputs . . . . . . . . . . . . . . . . . . . . . GND –0.5 to VDD +0.5 V
All Outputs . . . . . . . . . . . . . . . . . . . GND –0.5 to VDD +0.5 V
Storage Temperature . . . . . . . . . . . . . . . . . . . –65 to +150°C
Lead Temperature (Soldering 10 seconds) . . . . . . . +300°C
Package Power Dissipation Rating to 75°C
PQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450mW
Derates above 75°C . . . . . . . . . . . . . . . . . . . . . 14mW/°C
NOTES:
1
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
2
3
Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps
(HP5082-2835) from input pin to the supplies. All inputs have protection diodes which will protect the device from short
transients outside the supplies of less than 100mA for less than 100µs.
VDD refers to AVDD and DVDD. GND refers to AGND and DGND.
Rev. 3.00
5
EXAR [ EXAR CORPORATION ]
