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4450HG/3-K 参数 Datasheet PDF下载

4450HG/3-K图片预览
型号: 4450HG/3-K
PDF下载: 下载PDF文件 查看货源
内容描述: [Microprocessor, CMOS, PBGA324, ROHS COMPLIANT, HSBGA-324]
分类和应用: 外围集成电路
文件页数/大小: 92 页 / 780 K
品牌: EXAR [ EXAR CORPORATION ]
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Update 8.  
Update 9.  
Section 8.1 AC Operating Conditions, Table 33: changed tolerance for core  
supply voltage (vddi, vdda_pll) to 3%; tolerance for vdde, vddh and vddn  
to 5%; removed 2.5V for DDR1 for vddr and changed tolerance to 5%;  
added vdds specs.  
Section 8.2 PLL Ref Intf Clock Timing, Table 34 125MHz PLL_REF Clock:  
changed PLL lock time. Table 34 25MHz PLL_REF Clock: changed PLL lock  
time.  
Update 10. Section 8.3 RMII Timing: new timing diagram and table.  
Update 11. Section 8.4 GMII Timing(Host Intf): new table.  
Update 12. Section 8.5 TBI Timing(Host Intf): new table.  
Update 13. Section 8.6 RTBI Timing: added content to this section.  
Update 14. Section 8.7 RGMII Timing: added content to this section.  
Update 15. Section 8.8 SGMII Timing: added content to this section.  
Update 16. Section 8.9 SerDes Timing: added content to this section.  
Update 17. Section 8.10 SDRAM Timing: modified text to reflect DDR2 SDRAM only.  
Update 18. Section 9.1 Pin Lists: undated to reflect pinout changes.  
I.4 Document Revision D  
Update 1.  
Section 6.2.2 GMAC RGMII/RTBI Interface Usage (Host/Network) separated  
into Section 6.2.2 GMAC RGMII/RTBI Interface Usage (Host) and 6.2.2 GMAC  
RGMII/RTBI Interface Usage (Network) to correct signal name error.  
Update 2.  
Section 6.4 DDR2 SDRAM Interface: updated description for pins sdclk_fb_i  
and sdclk_fb_o.  
I.5 Document Revision E  
Update 1.  
Section 6.4.1 SDRAM Connection Diagrams: removed the 39-ohm series  
terms on the data signals.  
Update 2.  
Update 3.  
Update 4.  
Section 7.2 Package Thermal Specs: added data for 4 and 8 layer PCB  
boards.  
Section 7.3 Recommended Operating Conditions: added Table 32 Operating  
temp derating factor.  
Section 7.4 DC Characteristics Table 35 GPIO Interface: removed low and  
high level input current specification. Added low and high level output  
current. Table 33 GMAC Interface: removed low and high level input current  
specification.  
Update 5.  
Chapter 8 Timing: updated timing parameters for the DRAM, GMII, TBI,  
RGMII, RTBI, and RMII interfaces.  
I.6 Document Revision 00  
Update 1.  
Update 2.  
Changed SA support from 250 to 200. Removed support for MACsec.  
Section 1 Integrated Public-Key Processing: changed number of supported  
public key modules to 4096 from 8192, changed number of small packets  
to 550K per second.  
4450 – Data Sheet, DS-0131-06  
Page89  
Hifn Confidential  
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