6.2.2.3
Host GMAC RGMII/RTBI Pin Descriptions
Table 6-7 contains the pin descriptions for the RGMII/RTBI host interface ports when
configured in MAC mode.
Table 6-7. 4450 RGMII/RTBI Host pin descriptions - MAC mode
Pin Name
RGMII/RTBI Signal
I/O
Description
hx_clk_1
hx_rxc
in
The receive reference clock will be 125MHz,
25MHz or 2.5MHz.
hx_bus1[4]
RGMII: hx_rx_ctl
RTBI: hx_rxd[4]
in
in
In RTBI mode, contains the fifth bit on the
rising edge of rxc and the tenth bit on the
falling edge of rxc.
In RGMII mode, rxdv on the rising edge of
rxc and a logical derivative of rxdv (i.e. rxdv
XOR rxerr) on the falling edge of rxc.
hx_bus1[3:0]
hx_rxd[3:0]
In RTBI mode, contains bits [3:0] on the
rising edge of rxc and bits [8:5] on the
falling edge of rxc.
In RGMII mode, bit [3:0] on rising edge of
rxc, bits [7:4] on the falling edge of rxc.
hx_clk_0
hx_txc
out
out
The transmit reference clock will be 125MHz,
25MHz or 2.5MHz.
hx_bus0[4]
RGMII: hx_tx_ctl
RTBI: hx_txd[4]
In RTBI mode, contains the fifth bit on the
rising edge of txc and the tenth bit on the
falling edge of rxc.
In RGMII mode, txdv on the rising edge of
txc and a logical derivative of txdv (i.e., txdv
XOR txerr) on the falling edge of txc.
hx_bus0[3:0]
hx_txd[3:0]
out
In RTBI mode, contains bits [3:0] on the
rising edge of txc and bits [8:5] on the
falling edge of txc.
In RGMII mode, bit [3:0] on rising edge of
txc, bits [7:4] on the falling edge of txc.
Note
hx = h0 or h1
4450 – Data Sheet, DS-0131-06
Page42
Hifn Confidential
EXAR [ EXAR CORPORATION ]
