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4450HG/3-K 参数 Datasheet PDF下载

4450HG/3-K图片预览
型号: 4450HG/3-K
PDF下载: 下载PDF文件 查看货源
内容描述: [Microprocessor, CMOS, PBGA324, ROHS COMPLIANT, HSBGA-324]
分类和应用: 外围集成电路
文件页数/大小: 92 页 / 780 K
品牌: EXAR [ EXAR CORPORATION ]
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Table 6-5. 4450 GMII/TBI pin descriptions - PHY mode (Host Only) (Sheet 2 of 2)  
Pin Name  
GMII/TBI Signal  
GMII: tx_dv  
I/O  
Description  
hx_bus1[8]  
in  
In GMII mode, valid transmit data driven  
high by remote device on TX_DAT bus.  
TBI: tx_dat[8]  
In TBI mode, additional transmit output.  
Used with other TX_DAT outputs to form ten  
bit bus TX_DAT[9:0].  
hx_bus1[7:0]  
hx_bus0[9]  
tx_dat[7:0]  
in  
Transmit data for GbE. Only TX_DAT[3:0]  
used for 10/100FE(MII mode.  
GMII: tx_er  
out  
In GMII mode, asserted high by the PHY if a  
media error is detected.  
TBI: tx_dat[9]  
In TBI mode, additional receive input. Used  
with other RX_DAT inputs to form ten bit bus  
RX_DAT[9:0].  
xhx_bus0[8]  
GMII: rx_dv  
out  
out  
In GMII mode, receive data valid: driven  
high by PHY to indicate valid recovered data  
on RX_DAT bus.  
TBI: rx_dat[8]  
In TBI mode, additional receive input. Used  
with other RX_DAT inputs to form ten bit bus  
RX_DAT[9:0].  
hx_bus0[7:0]  
rx_dat[7:0]  
Receive data for GbE. Only RX_DAT[3:0]  
used for 10/100FE(MII mode.  
Note  
hx = h0 or h1  
6.2.2  
Host GMAC RGMII/RTBI Interface Usage  
This section discusses the use of GMAC interfaces for the host side interfaces h0 or h1  
when configured to support operation in RGMII or RTBI modes.  
6.2.2.1  
Host GMAC RGMII/RTBI Pin Mappings  
Table 6-6. 4450 RGMII/RTBI MAC/PHY modes Host pin mappings  
Pin Name  
MAC-RGMII  
RGMII Signal  
hx_rxc  
MAC-RTBI  
PHY-RGMII  
RGMII Signal  
hx_txc  
PHY-RTBI  
RTBI Signal  
hx_txc  
I/O  
in  
RTBI Signal I/O  
I/O  
in  
I/O  
in  
hx_clk_1  
hx_rxc  
in  
hx_bus1[4]  
hx_bus1[3:0]  
hx_clk_0  
hx_rx_ctl  
in  
hx_rxd[4]  
hx_rxd[3:0]  
hx_txc  
in  
hx_tx_ctl  
in  
hx_txd[4]  
hx_txd[3:0]  
hx_rxc  
in  
hx_rxd[3:0]  
hx_txc  
in  
in  
hx_txd[3:0]  
hx_rxc  
in  
in  
out  
out  
out  
out  
out  
out  
out  
out  
out  
out  
out  
out  
hx_bus0[4]  
hx_bus0[3:0]  
hx_tx_ctl  
hx_txd[4]  
hx_txd[3:0]  
hx_rx_ctl  
hx_rxd[3:0]  
hx_rxd[4]  
hx_rxd[3:0]  
hx_txd[3:0]  
Note  
1. hx = h0 or h1  
Table 6-12 provides the functional signal names and mapping for the Host ports if it is  
desired to run in SERDES mode.  
4450 – Data Sheet, DS-0131-06  
Page39  
Hifn Confidential