EtronTech
BA1
0
BA0
0
A9
0
1
A11
0
A10
0
A9
W.B.L
A8
4M x 32 LPSDRAM
Mode Resistor Bitmap
A7
TM
A8
0
1
0
A7
0
0
1
A6
A5
A4
CAS Latency
A3
BT
A3
0
1
EM669325
A2
A1
A0
Burst Length
Length
Burst
Single Bit
Mode
Normal
Reserved
Reserved
Type
Sequential
Interleave
A6
0
0
0
0
1
A5
0
0
1
1
0
A4
CAS Latency
0
Reserved
1
1 clock
0
2 clocks
1
3 clocks
1
Reserved
All other Reserved
A2
0
0
0
0
1
A1
0
0
1
1
1
A0
Burst Length
0
1
1
2
0
4
1
8
1
Full Page (Sequential)
All other Reserved
Burst Definition, Addressing Sequence of Sequential and Interleave Mode
Burst Length
2
4
8
Start Address
A2
A1
A0
X
X
0
X
X
1
X
0
0
X
0
1
X
1
0
X
1
1
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Sequential
0, 1
1, 0
0, 1, 2, 3
1, 2, 3, 0
2, 3, 0, 1
3, 0, 1, 2
0, 1, 2, 3, 4, 5, 6, 7
1, 2, 3, 4, 5, 6, 7, 0
2, 3, 4, 5, 6, 7, 0, 1
3, 4, 5, 6, 7, 0, 1, 2
4, 5, 6, 7, 0, 1, 2, 3
5, 6, 7, 0, 1, 2, 3, 4
6, 7, 0, 1, 2, 3, 4, 5
7, 0, 1, 2, 3, 4, 5, 6
Interleave
0, 1
1, 0
0, 1, 2, 3
1, 0, 3, 2
2, 3, 0, 1
3, 2, 1, 0
0, 1, 2, 3, 4, 5, 6, 7
1, 0, 3, 2, 5, 4, 7, 6
2, 3, 0, 1, 6, 7, 4, 5
3, 2, 1, 0, 7, 6, 5, 4
4, 5, 6, 7, 0, 1, 2, 3
5, 4, 7, 6, 1, 0, 3, 2
6, 7, 4, 5, 2, 3, 0, 1
7, 6, 5, 4, 3, 2, 1, 0
Preliminary
12
Rev 0.6
Sep. 2003