EM638165
EtronTech
Figure 37.1. Full Page Read Cycle
(Burst Length=Full Page, CAS# Latency=2)
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
High
CS#
RAS#
CAS#
WE#
BA0,1
A10
RBy
RBy
RAx
RBx
RBx
A0-A9,
A11
RAx
CAx
CBx
tRP
DQM
DQ
Hi-Z
Ax
Ax+1 Ax+2 Ax-2 Ax-1
Ax
Ax+1
Bx
Bx+1 Bx+2 Bx+3 Bx+4 Bx+5 Bx+6
The burst counter wraps
from the highest order
page address back to zero
during this time interval
Activate
Command
Bank A
Read
Command
Bank A
Activate
Command
Bank B
Read
Command
Bank B
Precharge
Command
Bank B
Activate
Command
Bank B
Full Page burst operation does not
Burst Stop
Command
Don’t Care
terminate when the burst length is satisfied;
the burst counter increments and continues
Bursting beginning with the starting address
Rev. 5.2
44
Rev. 5.2
Dec. /2013