EM638165
EtronTech
Figure 33.2. Interleaved Column Read Cycle
(Burst Length=4, CAS# Latency=3)
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
CS#
RAS#
CAS#
WE#
BA0,1
A10
RAx
RAx
RBx
RBx
A0-A9,
A11
CAx
CBx
CBy
CBz
CAy
tRCD
DQM
DQ
tAC
Hi-Z
Ax0
Ax1
Ax2
Ax3
Bx0
Bx1
By0
By1
Bz0
Bz1
Ay0
Ay1
Ay2
Ay3
Precharge
Command
Bank B
Activate
Command
Bank A
Precharge
Command
Bank A
Read
Command
Bank A
Read
Command
Bank B
Read
Command
Bank B
Read
Command
Bank B
Read
Command
Bank A
Activate
Command
Bank B
Don’t Care
Rev. 5.2
39
Rev. 5.2
Dec. /2013