EtronTech
EM636165-XXI
1M x 16 SDRAM
Figure 21. Random Row Read (Interleaving Banks)
(Burst Length=2, CAS# Latency=1)
T0 T 1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T 11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
tCK1
High
Begin Auto Begin Auto Begin Auto Begin Auto Begin Auto Begin Auto Begin Auto Begin Auto Begin Auto Begin Auto
CKE
CS#
Precharge
Bank B
Precharge
Bank A
Precharge
Bank B
Precharge
Bank A
Precharge
Bank B
Precharge
Bank A
Precharge
Bank B
Precharge
Bank A
Precharge
Bank B
Precharge
Bank A
RAS#
CAS#
WE#
A11
RAw
RAx
RBz
RBv
RAv
RBy
RAy
RAz
RAu
RBx
RBu
RBw
A10
A0~A9
DQM
RBu
CBv
t
RAv
CAw
t
RAx CAx RBy CBy
RAy CAy RBz
CBz RAz
CBu RAu CAu
RBv
CAv
CBw RAw
CBx
t
RBx
RBw
t
t
t
t
t
t
t
RP
RP
RP
RP
RP
RP
RP
RP
RP
RP
Bu0
Bu1 Au0
Au1
Bv0 Bv1
Av0
Av1 Bw0 Bw1 Aw0 Aw1 Bx0 Bx1
Ax0 Ax1 By0
By1 Ay0 Ay1
Bz0
DQ
Activate
Command
Bank B
Activate
Command
Bank A
Activate
Command
Bank B
Activate
Command
Bank A
Activate
Command
Bank B
Activate
Command
Bank A
Activate
Command
Bank B
Activate
Command
Bank A
Activate
Command
Bank B
Activate
Command
Bank A
Activate
Command
Bank B
Activate
Command
Bank A
Read
Read
Read
Read
Read
Read
Read
Read
Read
Read
Read
Bank B
with Auto
Precharge
Bank B
with Auto
Precharge
Bank A
with Auto
Precharge
Bank B
with Auto
Precharge
Bank A
with Auto
Precharge
Bank B
with Auto
Precharge
Bank A
with Auto
Precharge
Bank B
with Auto
Precharge
Bank A
with Auto
Precharge
Bank B
with Auto
Precharge
Bank A
with Auto
Precharge
Preliminary
67
Rev. 1.1 Apr. 2005