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M32L1632512A-8Q 参数 Datasheet PDF下载

M32L1632512A-8Q图片预览
型号: M32L1632512A-8Q
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM, 512KX32, 6.5ns, CMOS, PQFP100,]
分类和应用: 时钟动态存储器内存集成电路
文件页数/大小: 54 页 / 877 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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M32L1632512A  
PIN DESCRIPTION  
PIN  
NAME  
System Clock  
INPUT FUNCTION  
CLK  
CS  
Active on the positive going edge to sample all inputs  
Disables or enable device operation by masking or enabling all  
inputs except CLK, CKE and DQMi  
Chip Select  
Masks system clock to freeze operation from the next clock cycle.  
CKE  
Clock Enable  
Address  
CKE should be enabled at least one clock+ ss prior to new  
command.  
Disable input buffers for power down in standby.  
t
Row / column addresses are multiplexed on the same pins.  
Row address : RA0~RA9, column address : CA0~CA7  
A0 ~ A9  
A10(BA)  
RAS  
Selects bank to be activated during row address latch time.  
Selects bank for read / write during column address latch time.  
Bank Select Address  
Row Address Strobe  
Latches row addresses on the positive going edge of the CLK with  
RAS low.  
Enables row access & precharge.  
Latches column address on the positive going edge of the CLK  
With  
Column Address Strobe  
CAS  
CAS low.  
Enables column access.  
Write Enable  
Enables write operation and Row precharge.  
WE  
Makes data output Hi-Z, SHZ after the clock and masks the output.  
t
DQMi  
Data Input/Output Mask  
Blocks data input when DQM active. (Byte Masking)  
Data inputs/outputs are multiplexed on the same pins.  
Enables write per bit, block write and special mode register set.  
DQi  
Data Input/Output  
DSF  
Define Special/ Function  
Power Supply/ Ground  
Data Output Power/Ground  
VDD/VSS  
VDDQ/VSSQ  
ABSOLUTE MAXIMUM RATINGS (Voltage referenced to VSS)  
Parameter  
Voltage on any pin relative to VSS  
Voltage on VDD supply relative to VSS  
Storage temperature  
Symbol  
VIN, VOUT  
VDD, VDDQ  
TSTG  
Value  
-1.0 ~ 4.6  
-1.0 ~ 4.6  
-55 ~ +150  
1
Unit  
V
V
i
Power dissipation  
PD  
W
mA  
Short circuit current  
IOS  
50  
Note : Permanent device damage may occur if “ABSOLUTE MAXIMUM RATINGS” are exceeded.  
Functional operation should be restricted to recommended operating condition.  
Exposure to higher than recommended voltage for extended periods of time could affect device  
reliability.  
Elite Semiconductor Memory Technology Inc.  
Publication Date : Jun. 2001  
Revision : 1.6 3/54  
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