ESMT
Operation Temperature Condition
Parameter
Operation temperature
Symbol
T
C
M14D5121632A (2A)
Value
0 ~ +95
Unit
°C
Note: 1. Operating temperature is the case surface temperature on the center/top side of the DRAM.
2. Supporting 0 to +85℃ with full AC and DC specifications.
Supporting 0 to + 85℃ and being able to extend to + 95
℃
with doubling auto-refresh commands in frequency to a
32ms period ( t
REFI
= 3.9μ s ) and higher temperature Self-Refresh entry via A7 “1” on EMRS(2).
DC Operation Condition & Specifications
DC Operation Condition
(Recommended DC operating conditions)
Parameter
Supply voltage
Supply voltage for DLL
Supply voltage for output
Input reference voltage
Termination voltage (system)
Input logic high voltage
Input logic low voltage
(All voltages referenced to VSS)
Parameter
Minimum required output pull-up under AC test load
Maximum required output pull-down under AC test load
Input leakage current
Output leakage current
Output minimum source DC current ( V
DDQ
(min); V
OUT
=1.42V )
Output minimum sink DC current ( V
DDQ
(min); V
OUT
=
0.28V )
Note:
1. The value of V
REF
may be selected by the user to provide optimum noise margin in the system. Typically the value of
V
REF
is expected to be about 0.5 x V
DDQ
of the transmitting device and V
REF
is expected to track variations in V
DDQ
.
2. Peak to peak AC noise on V
REF
may not exceed
±2%
V
REF
(DC).
3. V
TT
of transmitting device must track V
REF
of receiving device.
4. V
DDQ
and V
DDL
track V
DD
. AC parameters are measured with V
DD
, V
DDQ
and V
DDL
tied together.
5. Any input 0V
≤
V
IN
≤
V
DD
; all other balls not under test = 0V.
6. 0V
≤
V
OUT
≤
V
DDQ
; DQ and ODT disabled.
7. The DC value of V
REF
applied to the receiving device is expected to be set to V
TT
.
8. After OCD calibration to 18Ω at T
C
= 25℃, V
DD
= V
DDQ
= 1.8V
9. There is no specific device V
DD
supply voltage requirement for SSTL_18 compliance. However, under all conditions
V
DDQ
must be less than or equal to V
DD.
Symbol
V
OH
V
OL
|I
LI
|
|I
LO
|
I
OH
I
OL
Value
V
TT
+ 0.603
V
TT
- 0.603
5
5
-13.4
+13.4
Unit
V
V
uA
uA
mA
mA
Note
8
8
5
6
7, 8
7, 8
Symbol
V
DD
V
DDL
V
DDQ
V
REF
V
TT
V
IH
(DC)
V
IL
(DC)
Min.
1.7
1.7
1.7
0.49 x V
DDQ
V
REF
- 0.04
V
REF
+ 0.125
-0.3
Typ.
1.8
1.8
1.8
0.5 x V
DDQ
V
REF
-
-
Max.
1.9
1.9
1.9
0.51 x V
DDQ
V
REF
+ 0.04
V
DDQ
+ 0.3
V
REF
- 0.125
Unit
V
V
V
V
V
V
V
Note
4,9
4,9
4,9
1,2,9
3,9
Elite Semiconductor Memory Technology Inc.
Publication Date : Oct. 2016
Revision : 1.0
5/64
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
