ESMT
M13S64164A
Read With Auto Precharge
If a read with auto-precharge command is initiated, the DDR SDRAM automatically enters the precharge operation BL/2 clock
later from a read with auto-precharge command when tRAS(min) is satisfied. If not, the start point of precharge operation will be
delayed until tRAS(min) is satisfied. Once the precharge operation has started the bank cannot be reactivated and the new
command can not be asserted until the precharge time (tRP) has been satisfied.
<Burst Length = 4, CAS Latency = 3>
0
1
2
3
4
5
6
7
8
C L K
C L K
C OMMAND
R
ea d
A
B a n k
A
N OP
N OP
N OP
N OP
N OP
N OP
N OP
Auto Pre cha rg e
A CT I V E
t R A P
D QS
C A S L a t e n cy = 3
Dout
0
Dout 2 Dout 3
1
D Q' s
Dout
At burst read / write with auto precharge, CAS interrupt of the same bank is illegal.
Write with Auto Precharge
If A10 is high when write command is issued, the write with auto-precharge function is performed. Any new command to the
same bank should not be issued until the internal precharge is completed. The internal precharge begins after keeping tWR(min).
<Burst Length = 4>
0
1
2
3
4
5
6
7
8
C L K
C L K
Write
Auto Precharge
A
B a n k
A
NO P
NO P
NO P
NO P
NO P
NO P
NO P
C O M M A N D
A C T I V E
DQ S
* B a n k c a n b e r e a c t i v a t e d a t
c o m p l e t i o n o f t R P
Dout 2
Dout 1
Dout 3
Dout 0
D Q ' s
t W R
t R P
I n t e r n a l p r e c h a r g e s t a r t
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2009
Revision : 1.4
23/48
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
