ESMT
M12L2561616A (2A)
Operation Temperature Condition -40°C~85°C
FUNCTION TRUTH TABLE (TABLE2)
Current
State
CKE
( n-1 )
CKE
n
ADDR
ACTION
Note
CS RAS CAS WE
H
L
L
L
L
L
L
H
L
L
X
H
H
H
H
H
L
X
H
H
H
H
H
L
H
L
L
L
L
L
L
L
L
X
H
L
L
L
X
X
H
H
H
L
X
X
X
H
H
H
L
X
X
X
H
H
H
L
X
X
H
H
L
X
X
X
X
H
H
L
X
X
X
X
H
H
L
H
H
L
X
X
H
L
X
X
X
X
X
H
L
X
X
X
X
X
H
L
X
H
H
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
INVALID
Exit Self Refresh Idle after tRFC (ABI)
Exit Self Refresh Idle after tRFC (ABI)
ILLEGAL
ILLEGAL
ILLEGAL
NOP (Maintain Self Refresh)
INVALID
Exit Self Refresh ABI
Exit Self Refresh ABI
ILLEGAL
6
6
Self
Refresh
L
X
X
H
L
L
L
All
Banks
Precharge
Power
7
7
L
L
L
L
ILLEGAL
ILLEGAL
Down
L
X
X
H
L
L
L
L
L
L
L
X
X
X
X
X
NOP (Maintain Low Power Mode)
Refer to Table1
Enter Power Down
Enter Power Down
ILLEGAL
ILLEGAL
Row (& Bank) Active
NOP
Enter Self Refresh
Mode Register Access
NOP
Refer to Operations in Table 1
Begin Clock Suspend next cycle
Exit Clock Suspend next cycle
Maintain Clock Suspend
H
H
H
H
H
H
H
H
H
L
8
8
X
X
X
RA
X
X
All
Banks
Idle
L
L
L
X
X
X
X
X
8
L
OP Code
L
H
L
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Any State
other than
Listed
H
H
L
9
9
above
L
Abbreviations: ABI = All Banks Idle, RA = Row Address
*Note: 6.CKE low to high transition is asynchronous.
7.CKE low to high transition is asynchronous if restart internal clock.
A minimum setup time 1CLK + tSS must be satisfy before any command other than exit.
8.Power down and self refresh can be entered only from the all banks idle state.
9.Must be a legal command.
Elite Semiconductor Memory Technology Inc.
Publication Date: Jun. 2012
Revision: 1.1
26/45
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
