ESMT
M12L2561616A (2A)
Operation Temperature Condition -40°C~85°C
Current
State
BA
ADDR
ACTION
Note
CS RAS CAS WE
H
L
L
L
L
L
L
H
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
L
X
H
H
H
L
X
H
H
L
H
H
L
X
H
H
L
H
H
L
X
H
L
H
L
X
H
H
L
X
H
L
X
H
L
X
X
H
L
X
H
L
X
X
X
X
X
X
X
H
L
X
X
X
BA
BA
BA
X
X
X
X
BA
BA
BA
X
X
X
X
X
X
X
X
X
X
CA
RA
A10/AP
NOP Idle after tRP
NOP Idle after tRP
ILLEGAL
ILLEGAL
ILLEGAL
NOP Idle after tRP
ILLEGAL
NOP Row Active after tRCD
NOP Row Active after tRCD
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
NOP Idle after tRFC
NOP Idle after tRFC
ILLEGAL
ILLEGAL
ILLEGAL
Read with
Auto
Precharge
2
2
2
4
L
L
X
X
X
X
X
H
H
H
L
L
L
X
H
H
L
Row
Activating
2
2
2
2
CA
RA
A10/AP
X
X
X
X
X
X
X
X
X
X
X
Refreshing
L
X
H
H
H
L
NOP Idle after 2clocks
NOP Idle after 2clocks
ILLEGAL
ILLEGAL
ILLEGAL
Mode
Register
Accessing
X
X
X
X
X
X
X
Abbreviations:
RA = Row Address
NOP = No Operation Command
BA = Bank Address
CA = Column Address
AP = Auto Precharge
*Note: 1. All entries assume the CKE was active (High) during the precharge clock and the current clock cycle.
2. Illegal to bank in specified state; Function may be legal in the bank indicated by BA, depending on the state of the bank.
3. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
4. NOP to bank precharge or in idle state. May precharge bank indicated by BA (and A10/AP).
5. Illegal if any bank is not idle.
Elite Semiconductor Memory Technology Inc.
Publication Date: Jun. 2012
Revision: 1.1 25/45
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
